On 20/07/2023 11:15, AngeloGioacchino Del Regno wrote:
Introduce all nodes for all of the display blocks in the MediaTek Helio
X10 MT6795 SoC, including the DSI PHY and DSI/DPI interfaces: those are
left disabled as usage is board specific.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 252 +++++++++++++++++++++++
1 file changed, 252 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 597bce2fed72..d805d7a63024 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -2,6 +2,9 @@
/*
* Copyright (c) 2015 MediaTek Inc.
* Author: Mars.C <mars.cheng@xxxxxxxxxxxx>
+ *
+ * Copyright (C) 2023 Collabora Ltd.
+ * AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
Shouldn't be like this ?
* Copyright (c) 2015 MediaTek Inc.
* Copyright (C) 2023 Collabora Ltd.
* Authors: Mars.C <mars.cheng@xxxxxxxxxxxx>
* AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
...*/
#include <dt-bindings/interrupt-controller/irq.h>
@@ -708,6 +953,13 @@ smi_common: smi@14022000 {
clock-names = "apb", "smi";
};
+ od@14023000 {
+ compatible = "mediatek,mt6795-disp-od", "mediatek,mt8173-disp-od";
+ reg = <0 0x14023000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OD>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1402XXXX 0x3000 0x1000>;
+ };
+
larb2: larb@15001000 {
compatible = "mediatek,mt6795-smi-larb";
reg = <0 0x15001000 0 0x1000>;
Reviewed-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx>