Re: [PATCH v3 0/8] Add Sipeed Lichee Pi 4A RISC-V board support

[Drew Fustini]

On Tue, Jul 25, 2023 at 09:10:06AM +0100, Conor Dooley wrote:
> Hey Guo Ren,
> 
> On Tue, Jul 25, 2023 at 08:52:09AM +0100, Conor Dooley wrote:
> > On Tue, Jul 25, 2023 at 03:38:58PM +0800, Xi Ruoyao wrote:
> > > On Sun, 2023-06-18 at 00:15 +0800, Jisheng Zhang wrote:
> > > > Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
> > > > module which is powered by T-HEAD's TH1520 SoC. Add minimal device
> > > > tree files for the core module and the development board.
> > > > 
> > > > Support basic uart/gpio/dmac drivers, so supports booting to a basic
> > > > shell.
> > > 
> > > Thanks for the excellent work, but when I tried to boot Linux 6.5.0-rc3
> > > on my Lichee Pi 4A it fails with:
> > > 
> > > ## Flattened Device Tree blob at 01f00000
> > >    Booting using the fdt blob at 0x1f00000
> > >    Using Device Tree in place at 0000000001f00000, end 0000000001f050c4
> > > 
> > > Starting kernel ...
> > > 
> > > [    0.000000] Linux version 6.5.0-rc3 (lfs@stargazer) (riscv64-lfs-linux-gnu-gcc (GCC) 13.1.0, GNU ld (GNU Binutils) 2.40) #1 SMP PREEMPT Tue Jul 25 13:38:20 CST 2023
> > > [    0.000000] Machine model: Sipeed Lichee Pi 4A
> > > [    0.000000] SBI specification v0.3 detected
> 
> > > [    0.000000] SBI implementation ID=0x1 Version=0x9
> 
> > > [    0.000000] Oops - load access fault [#1]
> > > [    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.5.0-rc3 #1
> > > [    0.000000] Hardware name: Sipeed Lichee Pi 4A (DT)
> > > [    0.000000] epc : __plic_toggle+0x5a/0x62
> > > [    0.000000]  ra : __plic_init.isra.0+0x2d0/0x462
> > > [    0.000000] epc : ffffffff802ce8ec ra : ffffffff80618816 sp : ffffffff80e03c90
> > > [    0.000000]  gp : ffffffff80ec5bb8 tp : ffffffff80e10d40 t0 : ffffffd900045940
> > > [    0.000000]  t1 : 0000000000000002 t2 : ffffffd90004a10c s0 : ffffffd9fef6ed68
> > > [    0.000000]  s1 : ffffffd900045680 a0 : ffffffc801002080 a1 : 0000000000000002
> > > [    0.000000]  a2 : 0000000000000000 a3 : 00000000000000f4 a4 : 0000000000000001
> > > [    0.000000]  a5 : 0000000000000000 a6 : 0000000000000b40 a7 : ffffffd900045940
> > > [    0.000000]  s2 : ffffffd9fef6ed78 s3 : ffffffff80ef9630 s4 : 0000000000000001
> > > [    0.000000]  s5 : ffffffd9ffff5af8 s6 : 0000000000000001 s7 : ffffffff80815d68
> > > [    0.000000]  s8 : 0000000000000008 s9 : 0000000000000000 s10: ffffffff80815d68
> > > [    0.000000]  s11: ffffffff80b1b1b8 t3 : ffffffff80c003d0 t4 : 0000000000000001
> > > [    0.000000]  t5 : 0000000000000003 t6 : 0000000000000001
> > > [    0.000000] status: 8000000201800100 badaddr: 000000ffd8002080 cause: 0000000000000005
> > > [    0.000000] [<ffffffff802ce8ec>] __plic_toggle+0x5a/0x62
> > > [    0.000000] [<ffffffff8061ffc8>] of_irq_init+0x14a/0x248
> > > [    0.000000] [<ffffffff80600a7e>] start_kernel+0x40c/0x6fe
> > > [    0.000000] [<ffffffff806034f6>] init_IRQ+0xc6/0x100
> > > [    0.000000] [<ffffffff80600a7e>] start_kernel+0x40c/0x6fe
> > > [    0.000000] Code: 0007 c319 9123 00e7 8082 000f 0140 411c 000f 0820 (c593) fff5 
> > > [    0.000000] ---[ end trace 0000000000000000 ]---
> > > [    0.000000] Kernel panic - not syncing: Fatal exception in interrupt
> > > 
> > > I guess I'm either using some unsupported configuration or making some
> > > stupid mistakes, but I cannot find any documentation about how to
> > > configure the mainline kernel for Lichee Pi 4A properly.  Could you give
> > > some pointers?
> > 
> > Are you using the vendor OpenSBI? IIRC, and the lads can probably
> > correct me here, you need to have an OpenSBI that contains
> > https://github.com/riscv-software-src/opensbi/commit/78c2b19218bd62653b9fb31623a42ced45f38ea6
> > which the vendor supplied OpenSBI does not have.
> 
> Guo Ren, can you try to get this sorted out? The T-Head SDK seems to be
> shipping stuff that is several years old, so new SoCs from vendors that
> have used your SDK are unable to run mainline kernels (and therefore
> mainstream distros), without a firmware update.
> 
> The TH1520 branch on github, seems to be based on OpenSBI v0.9:
> > > [    0.000000] SBI implementation ID=0x1 Version=0x9
> https://github.com/T-head-Semi/opensbi/blob/4e77060e0512ad981eee55d5a2501f6d88a41fd9/include/sbi/sbi_version.h#L13
> OpenSBI v0.9 was released on the 18/01/2021:
> https://github.com/riscv-software-src/opensbi/releases/tag/v0.9
> The "fix" I linked above was included in v1.0, released on 24/12/2021.
> 
> I think it is hitting here for the Lichee Pi4a, but I know the same
> thing has happened to the BeagleV Ahead, and I figure it'll impact
> other SoCs going forward too.

I ran into the access fault in the PLIC code when I first attempted to
run mainline Linux on the BeagleV Ahead. I switched from the vendor
OpenSBI v0.9 to uptream OpenSBI v1.3 and the PLIC oops went away.

For reference, my boot log when using OpenSBI v1.3:
https://gist.github.com/pdp7/23259595a7570f1f11086d286e16dfb6

And my device tree patch which essentially just adjusts the memory node
to match the amount of DDR in the BeagleV Ahead versus the lpi4a that
Jisheng has:
https://lore.kernel.org/linux-riscv/20230722-upstream-beaglev-ahead-dts-v2-0-a470ab8fe806@xxxxxxxxxxxx/

-Drew