Re: [PATCH v2 1/2] gpio: dt-bindings: add parsing of loongson gpio offset
From: Yinbo Zhu
Date: Tue Aug 01 2023 - 21:40:18 EST
在 2023/8/1 下午11:54, Conor Dooley 写道:
On Tue, Aug 01, 2023 at 04:34:30PM +0800, Yinbo Zhu wrote:
在 2023/8/1 下午3:23, Conor Dooley 写道:
On Tue, Aug 01, 2023 at 02:39:49PM +0800, Yinbo Zhu wrote:
在 2023/7/31 下午11:55, Conor Dooley 写道:
On Mon, Jul 31, 2023 at 05:10:58PM +0800, Yinbo Zhu wrote:
Add parsing GPIO configure, input, output, interrupt register offset
address and GPIO control mode support.
This reeks of insufficient use of SoC specific compatibles. Do GPIO
controllers on the same SoC have different register offsets?
Yes,
Where are the users for this?
For example, ls2k500 contains multiple GPIO chips with different
(configure, input, output, interrupt) offset addresses, but all others
are the same.
Right. That's admittedly not what I expected to hear! Can you firstly
explain this in the commit message,
I will add following explain in the commit message. Do you think it's
suitable?
Loongson GPIO controllers come in multiple variants that are compatible
except for certain register offset values. Add support in yaml file for
device properties allowing to specify them in DT.
Sure, that would be helpful.
and secondly add a soc-specific
compatible for the ls2k500 and only allow these properties on that SoC?
Sorry, I may not have described it clearly before, the ls2k500 was only
as a example, actually, Loongson GPIO controllers (2k500,2k1000,eg)come
in multiple variants that are compatible except for certain register
offset values. So above all offset device property was used to in all
loongson gpio controller.
But it would be good to know why they are different. Do they each
support some different features, or was there some other reason for
making controllers like this?
There are no other reasons, just differences in these offset addresses.
Thanks,
Yinbo.