Re: [PATCH] LoongArch: Fixup cmpxchg sematic for memory barrier

[WANG Rui]

On Wed, Aug 2, 2023 at 7:17 AM Guo Ren <guoren@xxxxxxxxxx> wrote:
>
> On Tue, Aug 1, 2023 at 12:37 PM WANG Rui <wangrui@xxxxxxxxxxx> wrote:
> >
> > On Tue, Aug 1, 2023 at 6:50 PM Guo Ren <guoren@xxxxxxxxxx> wrote:
> > >
> > > On Tue, Aug 1, 2023 at 5:32 PM WANG Rui <wangrui@xxxxxxxxxxx> wrote:
> > > > No. LL and LL won't reorder because LL implies a memory barrier(though
> > > > not acquire semantics).
> > > That means we could remove __WEAK_LLSC_MB totally, right?
> >
> > More precisely, __WEAK_LLSC_MB is intended to prevent reordering
> > between LL and normal LD used to fetch the expected value for cmpxchg.
> Oh, that's unnecessary when cmpxchg fails.
>
> Maybe you treat cmpxchg as a CoRR antidote in coincidence. Please
> solve the CoRR problem by READ_ONCE.
>
> See alpha architecture.

Unfortunately, the LL instruction has no acquire semantics. Even if
our kernel team improves READ_ONCE, it cannot prevent reordering
between LL and READ_ONCE after cmpxchg fails.

LL (<memory-barrier> + <load-exclusive>); WEAK_LLSC_MB; READ_ONCE
(<normal-load>); ...

vs

LL (<memory-barrier> + <load-exclusive>); READ_ONCE (<normal-load> +
<memory-barrier>); ...

Improving READ_ONCE is really important.

Regards,
-- 
WANG Rui