Re: [PATCH] parisc: kernel: Add require space after that ','

[Helge Deller]

On 7/20/23 08:40, hanyu001@xxxxxxxxxx wrote:
> Fix checkpatch warnings:
>
> ./arch/parisc/kernel/unaligned.c:522: ERROR: space required after that ',' (ctx:VxV)
>
> Signed-off-by: Yu Han <hanyu001@xxxxxxxxxx>

Hanyu, thanks for your patches!

You should use another email program, or use git send-mail because
your email program seems to convert tabs to spaces or breaks lines,
so that I can't cleanly apply some of your patches.

I've applied this one, but please resend the other patches if you want.

Helge

> ---
>   arch/parisc/kernel/unaligned.c | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
> index 752d0d0..3d346f2 100644
> --- a/arch/parisc/kernel/unaligned.c
> +++ b/arch/parisc/kernel/unaligned.c
> @@ -472,7 +472,7 @@ void handle_unaligned(struct pt_regs *regs)
>       case OPCODE_LDWA_I:
>       case OPCODE_LDW_S:
>       case OPCODE_LDWA_S:
> -        ret = emulate_ldw(regs, R3(regs->iir),0);
> +        ret = emulate_ldw(regs, R3(regs->iir), 0);
>           break;
>
>       case OPCODE_STH:
> @@ -481,7 +481,7 @@ void handle_unaligned(struct pt_regs *regs)
>
>       case OPCODE_STW:
>       case OPCODE_STWA:
> -        ret = emulate_stw(regs, R2(regs->iir),0);
> +        ret = emulate_stw(regs, R2(regs->iir), 0);
>           break;
>
>   #ifdef CONFIG_64BIT
> @@ -489,12 +489,12 @@ void handle_unaligned(struct pt_regs *regs)
>       case OPCODE_LDDA_I:
>       case OPCODE_LDD_S:
>       case OPCODE_LDDA_S:
> -        ret = emulate_ldd(regs, R3(regs->iir),0);
> +        ret = emulate_ldd(regs, R3(regs->iir), 0);
>           break;
>
>       case OPCODE_STD:
>       case OPCODE_STDA:
> -        ret = emulate_std(regs, R2(regs->iir),0);
> +        ret = emulate_std(regs, R2(regs->iir), 0);
>           break;
>   #endif
>
> @@ -502,24 +502,24 @@ void handle_unaligned(struct pt_regs *regs)
>       case OPCODE_FLDWS:
>       case OPCODE_FLDWXR:
>       case OPCODE_FLDWSR:
> -        ret = emulate_ldw(regs,FR3(regs->iir),1);
> +        ret = emulate_ldw(regs, FR3(regs->iir), 1);
>           break;
>
>       case OPCODE_FLDDX:
>       case OPCODE_FLDDS:
> -        ret = emulate_ldd(regs,R3(regs->iir),1);
> +        ret = emulate_ldd(regs, R3(regs->iir), 1);
>           break;
>
>       case OPCODE_FSTWX:
>       case OPCODE_FSTWS:
>       case OPCODE_FSTWXR:
>       case OPCODE_FSTWSR:
> -        ret = emulate_stw(regs,FR3(regs->iir),1);
> +        ret = emulate_stw(regs, FR3(regs->iir), 1);
>           break;
>
>       case OPCODE_FSTDX:
>       case OPCODE_FSTDS:
> -        ret = emulate_std(regs,R3(regs->iir),1);
> +        ret = emulate_std(regs, R3(regs->iir), 1);
>           break;
>
>       case OPCODE_LDCD_I: