[PATCH v3 3/3] cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native()
From: Smita Koralahalli
Date: Thu Aug 03 2023 - 19:02:00 EST
Use pcie_aer_is_native() to determine the native AER ownership as the
usage of host_bride->native_aer does not cover command line override of
AER ownership.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@xxxxxxx>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
Reviewed-by: Robert Richter <rrichter@xxxxxxx>
---
v2:
Replaced pcie_aer_is_native() at a later stage for automated
backports.
v3:
Added more context to commit message.
Added "Reviewed-by" tag.
---
drivers/cxl/pci.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 2323169b6e5f..44a21ab7add5 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -529,7 +529,6 @@ static int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
static int cxl_pci_ras_unmask(struct pci_dev *pdev)
{
- struct pci_host_bridge *host_bridge = pci_find_host_bridge(pdev->bus);
struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
void __iomem *addr;
u32 orig_val, val, mask;
@@ -542,7 +541,7 @@ static int cxl_pci_ras_unmask(struct pci_dev *pdev)
}
/* BIOS has PCIe AER error control */
- if (!host_bridge->native_aer)
+ if (!pcie_aer_is_native(pdev))
return 0;
rc = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &cap);
--
2.17.1