[PATCH RESEND v2 2/9] arm64: dts: qcom: sdx75: Add spmi node

From: Rohit Agarwal
Date: Mon Aug 07 2023 - 09:39:25 EST


Add SPMI node to SDX75 dtsi.

Signed-off-by: Rohit Agarwal <quic_rohiagar@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 21d5d55..6e2d07f 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -469,6 +469,29 @@
interrupt-controller;
};

+ spmi_bus: spmi@c400000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x0 0x0c400000 0x0 0x3000>,
+ <0x0 0x0c500000 0x0 0x400000>,
+ <0x0 0x0c440000 0x0 0x80000>,
+ <0x0 0x0c4c0000 0x0 0x10000>,
+ <0x0 0x0c42d000 0x0 0x4000>;
+ reg-names = "core",
+ "chnls",
+ "obsrvr",
+ "intr",
+ "cnfg";
+ interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "periph_irq";
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ qcom,bus-id = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
+
tlmm: pinctrl@f000000 {
compatible = "qcom,sdx75-tlmm";
reg = <0x0 0x0f000000 0x0 0x400000>;
--
2.7.4