Re: [patch 00/53] x86/topology: The final installment
From: Sohil Mehta
Date: Tue Aug 08 2023 - 16:08:49 EST
On 8/7/2023 6:52 AM, Thomas Gleixner wrote:
>
> The current series applies on top of
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git topo-cpuid-v3
>
> and is available from git here:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git topo-full-v1
>
I tested this on a 2S Ivy bridge system with 10 cores per socket
resulting in a total of 20 cores/40 threads. The specifications are
listed at:
https://www.intel.com/content/www/us/en/products/sku/75279/intel-xeon-processor-e52690-v2-25m-cache-3-00-ghz/specifications.html
However, I am a bit confused with the dmesg results.
Dmesg output
------------
CPU topo: Max. logical packages: 4
CPU topo: Max. logical dies: 4
CPU topo: Max. dies per package: 1
CPU topo: Max. threads per core: 2
CPU topo: Num. cores per package: 16
CPU topo: Num. threads per package: 32
CPU topo: Allowing 40 present CPUs plus 120 hotplug CPUs
CPU topo: Thread : 120
CPU topo: Core : 60
CPU topo: Module : 4
CPU topo: Tile : 4
CPU topo: Die : 4
CPU topo: Package : 4
smpboot: x86: Booting SMP configuration:
.... node #0, CPUs: #1 #2 #3 #4 #5 #6 #7 #8 #9
.... node #1, CPUs: #10 #11 #12 #13 #14 #15 #16 #17 #18 #19
.... node #0, CPUs: #20 #21 #22 #23 #24 #25 #26 #27 #28 #29
.... node #1, CPUs: #30 #31 #32 #33 #34 #35 #36 #37 #38 #39
smp: Brought up 2 nodes, 40 CPUs
smpboot: Total of 40 processors activated (239426.00 BogoMIPS)
Debugfs
-------
# cat /sys/kernel/debug/x86/topo/cpus/39
online: 1
initial_apicid: 39
apicid: 39
pkg_id: 1
die_id: 1
cu_id: 255
core_id: 12
logical_pkg_id: 1
logical_die_id: 1
llc_id: 32
l2c_id: 56
amd_node_id: 0
amd_nodes_per_pkg: 0
num_threads: 32
num_cores: 16
max_dies_per_pkg: 1
max_threads_per_core:2
lscpu output
------------
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Address sizes: 46 bits physical, 48 bits virtual
Byte Order: Little Endian
CPU(s): 40
On-line CPU(s) list: 0-39
Vendor ID: GenuineIntel
Model name: Intel(R) Xeon(R) CPU E5-2690 v2 @ 3.00GHz
CPU family: 6
Model: 62
Thread(s) per core: 2
Core(s) per socket: 10
Socket(s): 2
Stepping: 4
CPU max MHz: 3600.0000
CPU min MHz: 1200.0000
BogoMIPS: 5985.65
Virtualization features:
Virtualization: VT-x
Caches (sum of all):
L1d: 640 KiB (20 instances)
L1i: 640 KiB (20 instances)
L2: 5 MiB (20 instances)
L3: 50 MiB (2 instances)
NUMA:
NUMA node(s): 2
NUMA node0 CPU(s): 0-9,20-29
NUMA node1 CPU(s): 10-19,30-39
Questions
---------
1) Before this series, the Max logical packages used to be logged as 8
in dmesg. But now it shows up as 4. Is that expected?
To me, it seems that to get to 160 potential CPUs with 10cores/20threads
per package, the Max logical packages should be 8.
2) The "Num. cores per package" is listed as 16 in dmesg but shows as 10
in lscpu. The lscpu one seems correct to me. Why does dmesg show this as
16? I don't believe it refers to Max cores per package either?
3) Should the domain name and weight print be a little more descriptive?
pr_info("%-10s: %5u\n", domain_names[dom], domain_weight(dom));
Thread : 120
Core : 60
Module : 4
Tile : 4
Die : 4
Package : 4
This seems a little hard to decipher for the end user without some
context. Can you please help explain what does Thread: 120 refer to wrt
this system?
Please let me know if you need any additional info.
Maybe some of these things are not specific to this series. I apologize
for not raising these questions earlier. The new prints in dmesg caught
my eye and I started to wonder what it exactly means.
Thanks,
Sohil