Re: [RFC][PATCH 11/17] x86/cpu: Remove all SRSO interface nonsense

[Josh Poimboeuf]

On Wed, Aug 09, 2023 at 04:43:35PM +0200, Peter Zijlstra wrote:
> > >  		if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
> > >  		    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
> > >  			return sysfs_emit(buf, "Vulnerable: untrained return thunk / IBPB on non-AMD based uarch\n");
> > >  
> > > -		return sysfs_emit(buf, "%s; SMT %s\n", retbleed_strings[retbleed_mitigation],
> > > +		return sysfs_emit(buf, "%s; SMT %s%s\n", retbleed_strings[retbleed_mitigation],
> > >  				  !sched_smt_active() ? "disabled" :
> > >  				  spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT ||
> > >  				  spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED ?
> > > -				  "enabled with STIBP protection" : "vulnerable");
> > > -	}
> > > +				  "enabled with STIBP protection" : "vulnerable",
> > > +				  cpu_has_ibpb_brtype_microcode() ? "" : ", no SRSO microcode");
> > 
> > Hm?  What does missing microcode have to do with SMT?
> 
> semi-colon then, instead of comma ?

Nm, I was confused.  Comma is fine.

-- 
Josh