[PATCH v3 1/2] dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example
From: Thippeswamy Havalige
Date: Thu Aug 10 2023 - 08:20:32 EST
Update ECAM size in example to discover up to 256 buses.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@xxxxxxx>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxx>
---
changes in v2:
None.
changes in v1:
None.
---
Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
index 897602559b37..426f90a47f35 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
@@ -118,7 +118,7 @@ examples:
compatible = "xlnx,nwl-pcie-2.11";
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
- <0x80 0x00000000 0x0 0x1000000>;
+ <0x80 0x00000000 0x0 0x10000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
<0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
--
2.17.1