Re: [PATCH] dt-bindings: phy: st: convert phy-stih407-usb to DT schema

From: Rob Herring
Date: Fri Aug 11 2023 - 15:27:53 EST


On Tue, Aug 01, 2023 at 10:55:10PM +0200, Raphael Gallais-Pou wrote:
> From: Raphaël Gallais-Pou <raphael.gallais.pou@xxxxxxxxx>
>
> Convert the st,stih407-usb2-phy binding to DT schema format.
>
> Signed-off-by: Raphaël Gallais-Pou <raphael.gallais.pou@xxxxxxxxx>
> ---
> .../bindings/phy/phy-stih407-usb.txt | 24 -------
> .../bindings/phy/st,stih407-usb2-phy.yaml | 63 +++++++++++++++++++
> 2 files changed, 63 insertions(+), 24 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/phy/phy-stih407-usb.txt
> create mode 100644 Documentation/devicetree/bindings/phy/st,stih407-usb2-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt b/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt
> deleted file mode 100644
> index 35f03df00130..000000000000
> --- a/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt
> +++ /dev/null
> @@ -1,24 +0,0 @@
> -ST STiH407 USB PHY controller
> -
> -This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and USB3
> -host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroelectronics.
> -
> -Required properties:
> -- compatible : should be "st,stih407-usb2-phy"
> -- st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl register offsets
> -- resets : list of phandle and reset specifier pairs. There should be two entries, one
> - for the whole phy and one for the port
> -- reset-names : list of reset signal names. Should be "global" and "port"
> -See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
> -See: Documentation/devicetree/bindings/reset/reset.txt
> -
> -Example:
> -
> -usb2_picophy0: usbpicophy@f8 {
> - compatible = "st,stih407-usb2-phy";
> - #phy-cells = <0>;
> - st,syscfg = <&syscfg_core 0x100 0xf4>;
> - resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> - <&picophyreset STIH407_PICOPHY0_RESET>;
> - reset-names = "global", "port";
> -};
> diff --git a/Documentation/devicetree/bindings/phy/st,stih407-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/st,stih407-usb2-phy.yaml
> new file mode 100644
> index 000000000000..1f66ceddbf81
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/st,stih407-usb2-phy.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/st,stih407-usb2-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STMicroelectronics STiH407 USB PHY controller
> +
> +maintainers:
> + - Patrice Chotard <patrice.chotard@xxxxxxxxxxx>
> +
> +description:
> + The USB picoPHY driver is the PHY for both USB2 and USB3 host controllers
> + (when controlling usb2/1.1 devices) available on STiH407 SoC family from
> + STMicroelectronics.
> +
> +properties:
> + compatible:
> + const: st,stih407-usb2-phy
> +
> + st,syscfg:
> + description: Phandle to the syscfg bank
> + $ref: "/schemas/types.yaml#/definitions/uint32-array"

Drop quotes

The correct type is 'phandle-array' which is really a matrix, so you
need:

items:
- items:
- description: ...
- description: ...
- description: ...

> + items:
> + - description: phandle to syscfg
> + - description: phyparam register offset
> + - description: phyctrl register offset
> +
> + resets:
> + items:
> + - description: Phandle and reset specifier pair for the whole phy.
> + - description: Phandle and reset specifier pair for the port.
> +
> + reset-names:
> + description: List of reset signal names.
> + items:
> + - const: "global"
> + - const: "port"

Drop quotes

> +
> + "#phy-cells":
> + const: 0
> +
> +required:
> + - compatible
> + - st,syscfg
> + - resets
> + - reset-names
> + - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/reset/stih407-resets.h>
> + usb2_picophy0: usbpicophy {
> + compatible = "st,stih407-usb2-phy";
> + #phy-cells = <0>;
> + st,syscfg = <&syscfg_core 0x100 0xf4>;
> + resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> + <&picophyreset STIH407_PICOPHY0_RESET>;
> + reset-names = "global", "port";

Mixed spaces and tabs.

> + };
> +...
> --
> 2.41.0
>