Re: [PATCH v2 2/2] i2c: designware: Handle invalid SMBus block data response length value
From: Wolfram Sang
Date: Mon Aug 14 2023 - 09:31:01 EST
On Wed, Jul 26, 2023 at 03:00:01PM +0700, Tam Nguyen wrote:
> In the I2C_FUNC_SMBUS_BLOCK_DATA case, the invalid length byte value
> (outside of 1-32) of the SMBus block data response from the Slave device
> is not correctly handled by the I2C Designware driver.
>
> In case IC_EMPTYFIFO_HOLD_MASTER_EN==1, which cannot be detected
> from the registers, the Master can be disabled only if the STOP bit
> is set. Without STOP bit set, the Master remains active, holding the bus
> until receiving a block data response length. This hangs the bus and
> is unrecoverable.
>
> Avoid this by issuing another dump read to reach the stop condition when
> an invalid length byte is received.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Tam Nguyen <tamnguyenchi@xxxxxxxxxxxxxxxxxxxxxx>
Applied to for-current, thanks!
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