Re: [PATCH v2 05/11] x86/cpu: Clean up SRSO return thunk mess

[Borislav Petkov]

On Mon, Aug 14, 2023 at 01:44:31PM +0200, Peter Zijlstra wrote:
> Where Zen1/2 flush the BTB entry using the instruction decoder trick
> (test,movabs) Zen3/4 use instruction aliasing. SRSO adds RSB (RAP in

I'll change that "instruction aliasing" to "BTB aliasing".

> AMD speak) stuffing to force speculation into a trap an cause a
> mis-predict.

I'll change that to the much more precise:

"SRSO adds a return sequence (srso_safe_ret()) which forces the function
return instruction to speculate into a trap (UD2).  This RET will then
mispredict and execution will continue at the return site read from the
top of the stack."

-- 
Regards/Gruss,
    Boris.

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