[PATCH 2/2] KVM: arm64: timers: Adjust CVAL of a ptimer across guest entry and exits

[Ganapatrao Kulkarni]

As per FEAT_ECV, when HCR_EL2.{E2H, TGE} == {1, 1}, Enhanced Counter
Virtualization functionality is disabled and CNTPOFF_EL2 value is treated
as zero. On VHE host, E2H and TGE are set, hence it is required
to adjust CVAL by incrementing it by CNTPOFF_EL2 after guest
exit to avoid false physical timer interrupts and also
decrement/restore CVAL before the guest entry.

Signed-off-by: Ganapatrao Kulkarni <gankulkarni@xxxxxxxxxxxxxxxxxxxxxx>
---
 arch/arm64/kvm/arch_timer.c     | 32 ++++++++++++++++++++++++++++++++
 arch/arm64/kvm/hyp/vhe/switch.c | 13 +++++++++++++
 include/kvm/arm_arch_timer.h    |  1 +
 3 files changed, 46 insertions(+)

diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
index 98b0e8ac02ae..be609b12827d 100644
--- a/arch/arm64/kvm/arch_timer.c
+++ b/arch/arm64/kvm/arch_timer.c
@@ -955,6 +955,38 @@ void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
 		kvm_timer_blocking(vcpu);
 }
 
+static void ptimer_cval_adjust(struct arch_timer_context *ctx, bool inc)
+{
+	struct arch_timer_cpu *timer = vcpu_timer(ctx->vcpu);
+	unsigned long flags;
+	u64 cval, offset;
+
+	if (!timer->enabled || !ctx->loaded)
+		return;
+
+	local_irq_save(flags);
+	offset = timer_get_offset(ctx);
+	if (offset) {
+		cval = read_sysreg_el0(SYS_CNTP_CVAL);
+		if (inc)
+			cval += offset;
+		else
+			cval -= offset;
+		write_sysreg_el0(cval, SYS_CNTP_CVAL);
+		isb();
+	}
+	local_irq_restore(flags);
+}
+
+void kvm_ptimer_cval_adjust(struct kvm_vcpu *vcpu, bool inc)
+{
+	struct timer_map map;
+
+	get_timer_map(vcpu, &map);
+	if (map.direct_ptimer)
+		ptimer_cval_adjust(map.direct_ptimer, inc);
+}
+
 void kvm_timer_sync_nested(struct kvm_vcpu *vcpu)
 {
 	/*
diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index 561cb53e19ce..0cdcefc1351d 100644
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -100,6 +100,10 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
 		hcr |= vhcr_el2;
 	}
 
+	/* Decrement/Restore CVAL by CNTPOFF. */
+	if (has_cntpoff())
+		kvm_ptimer_cval_adjust(vcpu, false);
+
 	___activate_traps(vcpu, hcr);
 
 	val = read_sysreg(cpacr_el1);
@@ -141,6 +145,15 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
 
 	___deactivate_traps(vcpu);
 
+	/*
+	 * For VHE Host, HCR_EL2.{E2H, TGE} is {1, 1}, hence FEAT_ECV
+	 * is disabled and CNTPOFF_EL2 value is treated as zero.
+	 * Need to increment CVAL for non-zero CNTPOFF to avoid
+	 * false PTIMER interrupt.
+	 */
+	if (has_cntpoff())
+		kvm_ptimer_cval_adjust(vcpu, true);
+
 	write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
 
 	/*
diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
index ea77a569a907..3ce6f02a0d9b 100644
--- a/include/kvm/arm_arch_timer.h
+++ b/include/kvm/arm_arch_timer.h
@@ -117,6 +117,7 @@ void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu);
 void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
 
 void kvm_timer_init_vhe(void);
+void kvm_ptimer_cval_adjust(struct kvm_vcpu *vcpu, bool inc);
 
 #define vcpu_timer(v)	(&(v)->arch.timer_cpu)
 #define vcpu_get_timer(v,t)	(&vcpu_timer(v)->timers[(t)])
-- 
2.41.0