Re: [PATCH] crypto: caam - increase the domain of write memory barrier to full system

[Herbert Xu]

On Tue, Aug 08, 2023 at 12:55:26PM +0200, meenakshi.aggarwal@xxxxxxx wrote:
> From: Iuliana Prodan <iuliana.prodan@xxxxxxx>
> 
> In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb()
> fail to make the input ring be updated before the CAAM starts
> reading it. So, CAAM will process, again, an old descriptor address
> and will put it in the output ring. This will make caam_jr_dequeue()
> to fail, since this old descriptor is not in the software ring.
> To fix this, use wmb() which works on the full system instead of
> inner/outer shareable domains.
> 
> Signed-off-by: Iuliana Prodan <iuliana.prodan@xxxxxxx>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@xxxxxxx>
> ---
>  drivers/crypto/caam/jr.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)

Indeed, smp_wmb is always wrong for barriers separating DMA writes.

I wonder if these should be changed to:

$ git grep smp_wmb drivers/crypto/
drivers/crypto/caam/jr.c:       smp_wmb();
drivers/crypto/cavium/cpt/cptvf_reqmanager.c:   smp_wmb();
drivers/crypto/hisilicon/qm.c:  smp_wmb();
drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c:     smp_wmb();
drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c:             smp_wmb();
drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c:     smp_wmb();
drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c:             smp_wmb();
drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c:     smp_wmb();
drivers/crypto/talitos.c:       smp_wmb();
drivers/crypto/talitos.c:               smp_wmb();
$ 

Cheers,
-- 
Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
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