[GIT PULL] RISC-V Fixes for 6.5-rc7

[Palmer Dabbelt]

The following changes since commit 7e3811521dc3934e2ecae8458676fc4a1f62bf9f:

  riscv: Implement flush_cache_vmap() (2023-08-10 08:54:29 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.5-rc7

for you to fetch changes up to ca09f772cccaeec4cd05a21528c37a260aa2dd2c:

  riscv: Handle zicsr/zifencei issue between gcc and binutils (2023-08-16 07:39:38 -0700)

----------------------------------------------------------------
RISC-V Fixes for 6.5-rc7

* A fix to avoid excessive rejections from seccomp RET_ERRNO rules.
* A fix for compressed jal/jalr decoding.
* A pair of fixes for independent irq/softirq stacks on kernels built
  with CONFIG_FRAME_POINTER=n.
* A fix to avoid a hang handling uaccess fixups.
* Another build fix for toolchain ISA strings, this time for Zicsr and
  Zifenci on old GNU toolchains.

----------------------------------------------------------------
Alexandre Ghiti (1):
      riscv: uaccess: Return the number of bytes effectively not copied

Celeste Liu (1):
      riscv: entry: set a0 = -ENOSYS only when syscall != -1

Guo Ren (2):
      riscv: stack: Fixup independent irq stack for CONFIG_FRAME_POINTER=n
      riscv: stack: Fixup independent softirq stack for CONFIG_FRAME_POINTER=n

Mingzheng Xing (1):
      riscv: Handle zicsr/zifencei issue between gcc and binutils

Nam Cao (1):
      riscv: correct riscv_insn_is_c_jr() and riscv_insn_is_c_jalr()

 arch/riscv/Kconfig                     | 32 +++++++++++++++++++-------------
 arch/riscv/include/asm/insn.h          | 15 +++++++++++++--
 arch/riscv/kernel/compat_vdso/Makefile |  8 +++++++-
 arch/riscv/kernel/irq.c                |  3 +++
 arch/riscv/kernel/traps.c              |  9 ++++++---
 arch/riscv/lib/uaccess.S               | 11 +++++++----
 6 files changed, 55 insertions(+), 23 deletions(-)