Re: [PATCH v3 3/4] net: stmmac: Add glue layer for Loongson-1 SoC

From: Serge Semin
Date: Sat Aug 26 2023 - 16:42:00 EST

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In reply to: Keguang Zhang: "[PATCH v3 3/4] net: stmmac: Add glue layer for Loongson-1 SoC"
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On Thu, Aug 24, 2023 at 08:50:11PM +0800, Keguang Zhang wrote:
> This glue driver is created based on the arch-code
> implemented earlier with the platform-specific settings.
>
> Use syscon for SYSCON register access.
>
> Partially based on the previous work by Serge Semin.
>
> Signed-off-by: Keguang Zhang <keguang.zhang@xxxxxxxxx>
> ---
> V2 -> V3: Determine the device ID by physical
> base address(suggested by Serge Semin)
> Use regmap instead of regmap fields
> Use syscon_regmap_lookup_by_phandle()
> Some minor fixes
> V1 -> V2: Fix the build errors due to CONFIG_OF being unset
> Change struct reg_field definitions to const
> Rename the syscon property to "loongson,dwmac-syscon"
> Add MII PHY mode for LS1C
>
> drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +
> drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
> .../ethernet/stmicro/stmmac/dwmac-loongson1.c | 240 ++++++++++++++++++
> 3 files changed, 252 insertions(+)
> create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index 06c6871f8788..a2b9e289aa36 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -239,6 +239,17 @@ config DWMAC_INTEL_PLAT
> the stmmac device driver. This driver is used for the Intel Keem Bay
> SoC.
>
> +config DWMAC_LOONGSON1
> + tristate "Loongson1 GMAC support"
> + default MACH_LOONGSON32
> + depends on OF && (MACH_LOONGSON32 || COMPILE_TEST)
> + help
> + Support for ethernet controller on Loongson1 SoC.
> +
> + This selects Loongson1 SoC glue layer support for the stmmac
> + device driver. This driver is used for Loongson1-based boards
> + like Loongson LS1B/LS1C.
> +
> config DWMAC_TEGRA
> tristate "NVIDIA Tegra MGBE support"
> depends on ARCH_TEGRA || COMPILE_TEST
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 5b57aee19267..80e598bd4255 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -29,6 +29,7 @@ obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
> obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o
> obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o
> obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o
> +obj-$(CONFIG_DWMAC_LOONGSON1) += dwmac-loongson1.o
> obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
> obj-$(CONFIG_DWMAC_IMX8) += dwmac-imx.o
> obj-$(CONFIG_DWMAC_TEGRA) += dwmac-tegra.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c
> new file mode 100644
> index 000000000000..347d842141e4
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c
> @@ -0,0 +1,240 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Loongson-1 DWMAC glue layer
> + *
> + * Copyright (C) 2011-2023 Keguang Zhang <keguang.zhang@xxxxxxxxx>
> + */
> +
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#include "stmmac.h"
> +#include "stmmac_platform.h"
> +
> +#define LS1X_GMAC0_BASE (0xe10000)

> +#define LS1X_GMAC1_BASE (0xe20000)

If LS1C doesn't have the second GMAC then what about changing the
macros name to LS1B_GMAC1_BASE?

> +
> +/* Loongson-1 SYSCON Registers */
> +#define LS1X_SYSCON0 (0x0)
> +#define LS1X_SYSCON1 (0x4)
> +
> +/* Loongson-1B SYSCON Register Bits */

> +#define GMAC1_USE_UART1 BIT(4)
> +#define GMAC1_USE_UART0 BIT(3)
> +
> +#define GMAC1_SHUT BIT(13)
> +#define GMAC0_SHUT BIT(12)
> +
> +#define GMAC1_USE_TXCLK BIT(3)
> +#define GMAC0_USE_TXCLK BIT(2)
> +#define GMAC1_USE_PWM23 BIT(1)
> +#define GMAC0_USE_PWM01 BIT(0)
> +
> +/* Loongson-1C SYSCON Register Bits */
> +#define GMAC_SHUT BIT(6)
> +
> +#define PHY_INTF_SELI GENMASK(30, 28)

IMO having the SoC-specific prefixes (LS1B_ and LS1C_) in these names
would make the driver a bit more readable. But it's up to you to
decide.

> +#define PHY_INTF_SELI_SHIFT 28

Use FIELD_PREP():
#define PHY_INTF_MII FIELD_PREP(PHY_INTF_SELI, 0)
#define PHY_INTF_RMII FIELD_PREP(PHY_INTF_SELI, 4)

> +
> +struct ls1x_dwmac_syscon {
> + int (*syscon_init)(struct plat_stmmacenet_data *plat);
> +};

This struct is redundant. See further for details.

> +
> +struct ls1x_dwmac {

> + unsigned long reg_base;

this field

> + struct device *dev;

> + struct plat_stmmacenet_data *plat_dat;
> + const struct ls1x_dwmac_syscon *syscon;

and these fields are also redundant. See further for details.

> + struct regmap *regmap;
> +};
> +
> +static int ls1b_dwmac_syscon_init(struct plat_stmmacenet_data *plat)
> +{
> + struct ls1x_dwmac *dwmac = plat->bsp_priv;
> + struct regmap *regmap = dwmac->regmap;
> +

> + if ((dwmac->reg_base & LS1X_GMAC0_BASE) == LS1X_GMAC0_BASE) {

Is it necessary to bitwise-and-ing? What if LS1X_GMAC0_BASE would be
just a full physical base address? Then you'll be able to just compare
the base addresses.

> + switch (plat->phy_interface) {
> + case PHY_INTERFACE_MODE_RGMII_ID:
> + regmap_update_bits(regmap, LS1X_SYSCON0,
> + GMAC0_USE_TXCLK | GMAC0_USE_PWM01,
> + 0);
> + break;
> + case PHY_INTERFACE_MODE_MII:
> + regmap_update_bits(regmap, LS1X_SYSCON0,
> + GMAC0_USE_TXCLK | GMAC0_USE_PWM01,
> + GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> + break;
> + default:
> + dev_err(dwmac->dev, "Unsupported PHY mode %u\n",
> + plat->phy_interface);
> + return -EOPNOTSUPP;
> + }
> +
> + regmap_update_bits(regmap, LS1X_SYSCON0, GMAC0_SHUT, 0);

> + }
> +
> + if ((dwmac->reg_base & LS1X_GMAC1_BASE) == LS1X_GMAC1_BASE) {

else if?

> + regmap_update_bits(regmap, LS1X_SYSCON0,
> + GMAC1_USE_UART1 | GMAC1_USE_UART0,
> + GMAC1_USE_UART1 | GMAC1_USE_UART0);
> +
> + switch (plat->phy_interface) {
> + case PHY_INTERFACE_MODE_RGMII_ID:
> + regmap_update_bits(regmap, LS1X_SYSCON1,
> + GMAC1_USE_TXCLK | GMAC1_USE_PWM23,
> + 0);
> +
> + break;
> + case PHY_INTERFACE_MODE_MII:
> + regmap_update_bits(regmap, LS1X_SYSCON1,
> + GMAC1_USE_TXCLK | GMAC1_USE_PWM23,
> + GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> + break;
> + default:
> + dev_err(dwmac->dev, "Unsupported PHY mode %u\n",
> + plat->phy_interface);
> + return -EOPNOTSUPP;
> + }
> +
> + regmap_update_bits(regmap, LS1X_SYSCON1, GMAC1_SHUT, 0);

> + }

else {
dev_err(...)
return -EINVAL;
}
?

* unless you have some more DW GMACs on the SoC which don't require the
syscon setups.

> +
> + return 0;
> +}
> +
> +static int ls1c_dwmac_syscon_init(struct plat_stmmacenet_data *plat)
> +{
> + struct ls1x_dwmac *dwmac = plat->bsp_priv;
> + struct regmap *regmap = dwmac->regmap;
> +
> + switch (plat->phy_interface) {
> + case PHY_INTERFACE_MODE_MII:

> + regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI, 0);

regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI,
PHY_INTF_MII);

> + break;
> + case PHY_INTERFACE_MODE_RMII:

> + regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI,
> + 4 << PHY_INTF_SELI_SHIFT);

regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI,
PHY_INTF_RMII);

> + break;
> + default:
> + dev_err(dwmac->dev, "Unsupported PHY-mode %u\n",
> + plat->phy_interface);
> + return -EOPNOTSUPP;
> + }
> +
> + regmap_update_bits(regmap, LS1X_SYSCON0, GMAC0_SHUT, 0);
> +
> + return 0;
> +}
> +

> +static const struct ls1x_dwmac_syscon ls1b_dwmac_syscon = {
> + .syscon_init = ls1b_dwmac_syscon_init,
> +};
> +
> +static const struct ls1x_dwmac_syscon ls1c_dwmac_syscon = {
> + .syscon_init = ls1c_dwmac_syscon_init,
> +};

This can be dropped. See the next comment for details.

> +
> +static int ls1x_dwmac_init(struct platform_device *pdev, void *priv)
> +{
> + struct ls1x_dwmac *dwmac = priv;
> + struct resource *res;
> + int ret;
> +

> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
> + return -EINVAL;
> + }
> + dwmac->reg_base = (unsigned long)res->start;

What about moving this to ls1b_dwmac_syscon_init() seeing it's used
for LS1B only? Thus you won't need to have the reg_base defined in the
private data and can get rid from the ls1x_dwmac_init() method setting
the ls1b_dwmac_syscon_init() and ls1c_dwmac_syscon_init() pointers
directly to the device match data.

> +
> + if (dwmac->syscon->syscon_init) {
> + ret = dwmac->syscon->syscon_init(dwmac->plat_dat);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int ls1x_dwmac_probe(struct platform_device *pdev)
> +{
> + struct plat_stmmacenet_data *plat_dat;
> + struct stmmac_resources stmmac_res;
> + struct regmap *regmap;
> + struct ls1x_dwmac *dwmac;

> + const struct ls1x_dwmac_syscon *syscon;

This can be replaced with just
int (*init)(struct platform_device *pdev, void *priv);

> + int ret;
> +
> + ret = stmmac_get_platform_resources(pdev, &stmmac_res);
> + if (ret)
> + return ret;
> +
> + /* Probe syscon */
> + regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> + "loongson,ls1-syscon");
> + if (IS_ERR(regmap)) {

> + ret = PTR_ERR(regmap);
> + dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret);
> + return ret;

return dev_err_probe(&pdev->dev, PTR_ERR(regmap), "Unable to find syscon\n");

> + }
> +

> + syscon = of_device_get_match_data(&pdev->dev);

init = of_device_get_match_data(&pdev->dev);

> + if (!syscon) {
> + dev_err(&pdev->dev, "No of match data provided\n");
> + return -EINVAL;
> + }
> +
> + dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> + if (!dwmac)
> + return -ENOMEM;
> +
> + plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> + if (IS_ERR(plat_dat)) {
> + dev_err(&pdev->dev, "dt configuration failed\n");
> + return PTR_ERR(plat_dat);
> + }
> +
> + plat_dat->bsp_priv = dwmac;

> + plat_dat->init = ls1x_dwmac_init;

plat_dat->init = init;

> + dwmac->dev = &pdev->dev;
> + dwmac->plat_dat = plat_dat;
> + dwmac->syscon = syscon;
> + dwmac->regmap = regmap;
> +
> + ret = stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
> + if (ret)
> + goto err_remove_config_dt;
> +
> + return 0;
> +
> +err_remove_config_dt:
> + stmmac_remove_config_dt(pdev, plat_dat);
> +
> + return ret;
> +}
> +
> +static const struct of_device_id ls1x_dwmac_match[] = {

> + { .compatible = "loongson,ls1b-gmac", .data = &ls1b_dwmac_syscon, },
> + { .compatible = "loongson,ls1c-emac", .data = &ls1c_dwmac_syscon, },

{ .compatible = "loongson,ls1b-gmac", .data = &ls1b_dwmac_syscon_init, },
{ .compatible = "loongson,ls1c-emac", .data = &ls1c_dwmac_syscon_init, },

Thus you can simplify the driver by:
1. dropping ls1x_dwmac_syscon definition and its instances.
2. dropping three redundant fields from the ls1x_dwmac structure.
3. dropping the ls1x_dwmac_init() method.
Sounds like worth it.)

Note if no further driver update is planned then you can drop the
ls1x_dwmac->dev field too. Otherwise you can keep it seeing some of
the plat_stmmacenet_data data callbacks do have any device instance
passed.

-Serge(y)

> + { }
> +};
> +MODULE_DEVICE_TABLE(of, ls1x_dwmac_match);
> +
> +static struct platform_driver ls1x_dwmac_driver = {
> + .probe = ls1x_dwmac_probe,
> + .remove_new = stmmac_pltfr_remove,
> + .driver = {
> + .name = "loongson1-dwmac",
> + .of_match_table = ls1x_dwmac_match,
> + },
> +};
> +module_platform_driver(ls1x_dwmac_driver);
> +
> +MODULE_AUTHOR("Keguang Zhang <keguang.zhang@xxxxxxxxx>");
> +MODULE_DESCRIPTION("Loongson1 DWMAC glue layer");
> +MODULE_LICENSE("GPL");
> --
> 2.39.2
>
>

Next message: Qais Yousef: "Re: [PATCH v4 1/3] sched/uclamp: Set max_spare_cap_cpu even if max_spare_cap is 0"
Previous message: Nam Cao: "Re: [PATCH v2 1/4] staging: vme_user: fix check alignment of open parenthesis in vme_fake.c"
In reply to: Keguang Zhang: "[PATCH v3 3/4] net: stmmac: Add glue layer for Loongson-1 SoC"
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