Re: [PATCH RFC v2 0/4] RISC-V: Add basic eMMC support for BeagleV Ahead

[Jiexun Wang]

Hello,
I tested the patch on my LicheePi 4A board.
It can successfully boot with eMMC, but when I use the eMMC more frequently - for instance:

$ while true; do /bin/dd if=/dev/zero of=bigfile bs=1024000 count=1024; done &

I encounter the following error:

sbi_trap_error: hart1: illegal instruction handler failed (error -2)
sbi_trap_error: hart1: mcause=0x0000000000000002 mtval=0x0000000060e2de4f
sbi_trap_error: hart1: mepc=0x000000000001897c mstatus=0x0000000a00001820
sbi_trap_error: hart1: ra=0x00000000000170f8 sp=0x000000000004adc8
sbi_trap_error: hart1: gp=0xffffffff8136ea90 tp=0xffffffd900228000
sbi_trap_error: hart1: s0=0x0000000000000000 s1=0x000000000004ae08
sbi_trap_error: hart1: a0=0x000000003f9aa9bc a1=0x0000000000000004
sbi_trap_error: hart1: a2=0x0000000000000000 a3=0x0000000000000000
sbi_trap_error: hart1: a4=0x0000000000042248 a5=0x00000000000170e5
sbi_trap_error: hart1: a6=0x0000000000000000 a7=0x0000000054494d45
sbi_trap_error: hart1: s2=0x000000000004aee8 s3=0x0000000000000000
sbi_trap_error: hart1: s4=0x000000000004ae08 s5=0x0000000000000000
sbi_trap_error: hart1: s6=0xffffffff813aa240 s7=0x0000000000000080
sbi_trap_error: hart1: s8=0xffffffff80a1b5f0 s9=0x0000000000000000
sbi_trap_error: hart1: s10=0xffffffd9fef5d380 s11=0xffffffff81290a80
sbi_trap_error: hart1: t0=0x0000000a00000820 t1=0x0000000000000000
sbi_trap_error: hart1: t2=0xffffffff80c00318 t3=0x0000000000000001
sbi_trap_error: hart1: t4=0x0000000000000330 t5=0x0000000000000001
sbi_trap_error: hart1: t6=0x0000000000040000

My kernel version is v6.5-rc3.
My OpenSBI version is 1.3.
I tried to use other versions of OpenSBI, yet the problem persists. 
Is there a possibility of any underlying bug? Your insights into this would be greatly appreciated.

Thanks,
Jiexun Wang