Re: [PATCH v2 RESEND 2/2] dt-bindings: usb: dwc3: Add DWC_usb3 TX/RX threshold configurable

[Rob Herring]

On Mon, 28 Aug 2023 13:52:06 +0800, Stanley Chang wrote:
> In Synopsys's dwc3 data book:
> To avoid underrun and overrun during the burst, in a high-latency bus
> system (like USB), threshold and burst size control is provided through
> GTXTHRCFG and GRXTHRCFG registers.
> By default, USB TX and RX threshold are not enabled. To enable
> TX or RX threshold, both packet threshold count and max burst size
> properties must be set to a valid non-zero value.
> 
> In Realtek DHC SoC, DWC3 USB 3.0 uses AHB system bus. When dwc3 is
> connected with USB 2.5G Ethernet, there will be overrun problem.
> Therefore, setting TX/RX thresholds can avoid this issue.
> 
> Signed-off-by: Stanley Chang <stanley_chang@xxxxxxxxxxx>
> ---
> v1 to v2 change:
>     Add the properties for TX/RX threshold setting
> ---
>  .../devicetree/bindings/usb/snps,dwc3.yaml    | 56 +++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>