Re: [PATCH] riscv: kprobes: allow writing to x0

[Guo Ren]

On Wed, Aug 30, 2023 at 2:25 AM Nam Cao <namcaov@xxxxxxxxx> wrote:
>
> Instructions can write to x0, so we should simulate these instructions
> normally.
>
> Currently, the kernel hangs if an instruction who writes to x0 is
> simulated.
>
> Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Nam Cao <namcaov@xxxxxxxxx>
> ---
>  arch/riscv/kernel/probes/simulate-insn.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
> index d3099d67816d..6c166029079c 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.c
> +++ b/arch/riscv/kernel/probes/simulate-insn.c
> @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index,
>                                        unsigned long val)
>  {
>         if (index == 0)
> -               return false;
> +               return true;
Acked-by: Guo Ren <guoren@xxxxxxxxxx>

>         else if (index <= 31)
>                 *((unsigned long *)regs + index) = val;
>         else
> --
> 2.34.1
>


-- 
Best Regards
 Guo Ren