Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property

From: Suzuki K Poulose
Date: Mon Sep 04 2023 - 04:26:56 EST


On 04/09/2023 06:05, Linu Cherian wrote:
memory-region 0: Reserved trace buffer memory

TMC ETR: When available, use this reserved memory region for
trace data capture. Same region is used for trace data
retention after a panic or watchdog reset.

TMC ETF: When available, use this reserved memory region for
trace data retention synced from internal SRAM after a panic or
watchdog reset.

memory-region 1: Reserved meta data memory

TMC ETR, ETF: When available, use this memory for register
snapshot retention synced from hardware registers after a panic
or watchdog reset.

Instead of having to use a number to map the memory regions, could
we use

memory-region-names property to describe the index ? That way it
is much easier to read and is less error prone.

Names could be something like:

tmc-reserved-trace
tmc-reserved-metadata

Suzuki


Signed-off-by: Linu Cherian <lcherian@xxxxxxxxxxx>
---
.../devicetree/bindings/arm/arm,coresight-tmc.yaml | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
index cb8dceaca70e..dce54978554a 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
@@ -101,6 +101,17 @@ properties:
and ETF configurations.
$ref: /schemas/graph.yaml#/properties/port
+ memory-region:
+ items:
+ - description: Reserved trace buffer memory for ETR and ETF sinks.
+ For ETR, this reserved memory region is used for trace data capture.
+ Same region is used for trace data retention as well after a panic
+ or watchdog reset.
+ For ETF, this reserved memory region is used for retention of trace
+ data synced from internal SRAM after a panic or watchdog reset.
+
+ - description: Reserved meta data memory. Used for ETR and ETF sinks.
+
required:
- compatible
- reg
@@ -115,6 +126,8 @@ examples:
etr@20070000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x20070000 0x1000>;
+ memory-region = <&etr_trace_mem_reserved>,
+ <&etr_mdata_mem_reserved>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";