[PATCH 2/2] arm64: dts: qcom: sa8775p: enable the inline crypto engine
From: Bartosz Golaszewski
Date: Wed Sep 13 2023 - 11:35:46 EST
Add an ICE node to sa8775p SoC description and enable it by adding a
phandle to the UFS node.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 9f4f58e831a4..b6a93b11cbbd 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -1525,6 +1525,7 @@ ufs_mem_hc: ufs@1d84000 {
<0 0>,
<0 0>,
<0 0>;
+ qcom,ice = <&ice>;
status = "disabled";
};
@@ -1546,6 +1547,13 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
+ ice: crypto@1d88000 {
+ compatible = "qcom,sa8775p-inline-crypto-engine",
+ "qcom,inline-crypto-engine";
+ reg = <0x0 0x01d88000 0x0 0x8000>;
+ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+ };
+
usb_0_hsphy: phy@88e4000 {
compatible = "qcom,sa8775p-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";
--
2.39.2