[PATCH 13/13] arm64: dts: imx8mp: remove assigned-clock-rate of IMX8MP_VIDEO_PLL1

From: Benjamin Bara
Date: Sun Sep 17 2023 - 18:44:21 EST


From: Benjamin Bara <benjamin.bara@xxxxxxxxxxx>

Similar to commit 16c984524862 ("arm64: dts: imx8mp: don't initialize
audio clocks from CCM node").

With commit b09c68dc57c9 ("clk: imx: pll14xx: Support dynamic rates") in
place, the clock consumer (e.g. a panel) is able to set a more suitable
rate for the IMX8MP_VIDEO_PLL1. As composite-8m is now able to propagate
the rate through, avoid setting a rate in the dtsi.

Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Signed-off-by: Benjamin Bara <benjamin.bara@xxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9539d747e28e..f40b40ee8f9e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1742,7 +1742,6 @@ media_blk_ctrl: blk-ctrl@32ec0000 {
<&clk IMX8MP_CLK_MEDIA_APB>,
<&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
<&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
- <&clk IMX8MP_VIDEO_PLL1>,
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_SYS_PLL1_800M>,
@@ -1750,8 +1749,7 @@ media_blk_ctrl: blk-ctrl@32ec0000 {
<&clk IMX8MP_VIDEO_PLL1_OUT>,
<&clk IMX8MP_CLK_24M>;
assigned-clock-rates = <500000000>, <200000000>,
- <0>, <0>, <1039500000>,
- <24000000>;
+ <0>, <0>, <24000000>;
#power-domain-cells = <1>;

lvds_bridge: bridge@5c {

--
2.34.1