[PATCH v2 2/4] platform/x86: ISST: Allow level 0 to be not present

From: Srinivas Pandruvada
Date: Tue Oct 03 2023 - 12:32:46 EST


It is possible that SST level 0 or base level is not present in some
configurations. So don't set level 0 mask in level_en_mask by default.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@xxxxxxxxxxxxxxx>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
---
v2:
No change, just added Reviewed by

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 3 ---
1 file changed, 3 deletions(-)

diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
index a672a1c814af..ac5c6a812592 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
@@ -364,9 +364,6 @@ static int sst_main(struct auxiliary_device *auxdev, struct tpmi_per_power_domai
/* Read PP header */
*((u64 *)&pd_info->pp_header) = readq(pd_info->sst_base + pd_info->sst_header.pp_offset);

- /* Force level_en_mask level 0 */
- pd_info->pp_header.level_en_mask |= 0x01;
-
mask = 0x01;
levels = 0;
for (i = 0; i < 8; ++i) {
--
2.41.0