Re: [PATCH] x86: KVM: Add feature flag for AMD's FsGsKernelGsBaseNonSerializing

From: Jim Mattson
Date: Thu Oct 05 2023 - 13:32:39 EST


On Thu, Oct 5, 2023 at 10:14 AM Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote:
>
> On 10/5/23 19:06, Jim Mattson wrote:
> > On Thu, Oct 5, 2023 at 9:39 AM Paolo Bonzini<pbonzini@xxxxxxxxxx> wrote:
> >
> >> I agree with Jim that it would be nice to have some bits from Intel, and
> >> some bits from AMD, that current processors always return as 1. Future
> >> processors can change those to 0 as desired.
> > That's not quite what I meant.
> >
> > I'm suggesting a leaf devoted to single bit negative features. If a
> > bit is set in hardware, it means that something has been taken away.
> > Hypervisors don't need to know exactly what was taken away. For this
> > leaf only, hypervisors will always pass through a non-zero bit, even
> > if they have know idea what it means.
>
> Understood, but I'm suggesting that these might even have the right
> polarity: if a bit is set it means that something is there and might not
> in the future, even if we don't know exactly what. We can pass through
> the bit, we can AND bits across the migration pool to define what to
> pass to the guest, we can force-set the leaves to zero (feature
> removed). Either way, the point is to group future defeatures together.

Oh, yeah. Your suggestion is better. :)