Re: [PATCH v2 0/5] drm/bridge: samsung-dsim: fix various modes with ADV7535 bridge
From: Marek Szyprowski
Date: Fri Oct 06 2023 - 12:17:01 EST
On 06.10.2023 17:07, Michael Tretter wrote:
> I tested the i.MX8M Nano EVK with the NXP supplied MIPI-DSI adapter,
> which uses an ADV7535 MIPI-DSI to HDMI converter. I found that a few
> modes were working, but in many modes my monitor stayed dark.
>
> This series fixes the Samsung DSIM bridge driver to bring up a few more
> modes:
>
> The driver read the rate of the PLL ref clock only during probe.
> However, if the clock is re-parented to the VIDEO_PLL, changes to the
> pixel clock have an effect on the PLL ref clock. Therefore, the driver
> must read and potentially update the PLL ref clock on every modeset.
>
> I also found that the rounding mode of the porches and active area has
> an effect on the working modes. If the driver rounds up instead of
> rounding down and be calculates them in Hz instead of kHz, more modes
> start to work.
>
> The following table shows the modes that were working in my test without
> this patch set and the modes that are working now:
>
> | Mode | Before | Now |
> | 1920x1080-60.00 | X | X |
> | 1920x1080-59.94 | | X |
> | 1920x1080-50.00 | | X |
> | 1920x1080-30.00 | | X |
> | 1920x1080-29.97 | | X |
> | 1920x1080-25.00 | | X |
> | 1920x1080-24.00 | | |
> | 1920x1080-23.98 | | |
> | 1680x1050-59.88 | | X |
> | 1280x1024-75.03 | X | X |
> | 1280x1024-60.02 | X | X |
> | 1200x960-59.99 | | X |
> | 1152x864-75.00 | X | X |
> | 1280x720-60.00 | | |
> | 1280x720-59.94 | | |
> | 1280x720-50.00 | | X |
> | 1024x768-75.03 | | X |
> | 1024x768-60.00 | | X |
> | 800x600-75.00 | X | X |
> | 800x600-60.32 | X | X |
> | 720x576-50.00 | X | X |
> | 720x480-60.00 | | |
> | 720x480-59.94 | X | |
> | 640x480-75.00 | X | X |
> | 640x480-60.00 | | X |
> | 640x480-59.94 | | X |
> | 720x400-70.08 | | |
>
> Interestingly, the 720x480-59.94 mode stopped working. However, I am
> able to bring up the 720x480 modes by manually hacking the active area
> (hsa) to 40 and carefully adjusting the clocks, but something still
> seems to be off.
>
> Unfortunately, a few more modes are still not working at all. The NXP
> downstream kernel has some quirks to handle some of the modes especially
> wrt. to the porches, but I cannot figure out, what the driver should
> actually do in these cases. Maybe there is still an error in the
> calculation of the porches and someone at NXP can chime in.
>
> Michael
>
> Signed-off-by: Michael Tretter <m.tretter@xxxxxxxxxxxxxx>
All my Exynos-based test boards with DSI display panels still work fine
with this patchset.
Feel free to add:
Tested-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> ---
> Changes in v2:
> - Specify limits for the PLL input clock in samsung_dsim_driver_data
> - Rephrase/clarify commit messages
> - Link to v1: https://lore.kernel.org/r/20230818-samsung-dsim-v1-0-b39716db6b7a@xxxxxxxxxxxxxx
>
> ---
> Marco Felsch (1):
> drm/bridge: samsung-dsim: add more mipi-dsi device debug information
>
> Michael Tretter (4):
> drm/bridge: samsung-dsim: reread ref clock before configuring PLL
> drm/bridge: samsung-dsim: update PLL reference clock
> drm/bridge: samsung-dsim: adjust porches by rounding up
> drm/bridge: samsung-dsim: calculate porches in Hz
>
> drivers/gpu/drm/bridge/samsung-dsim.c | 54 +++++++++++++++++++++++++++--------
> include/drm/bridge/samsung-dsim.h | 3 ++
> 2 files changed, 45 insertions(+), 12 deletions(-)
> ---
> base-commit: b78b18fb8ee19f7a05f20c3abc865b3bfe182884
> change-id: 20230818-samsung-dsim-42346444bce5
>
> Best regards,
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland