Re: [PATCH 4/6] arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2

From: Geert Uytterhoeven
Date: Thu Oct 12 2023 - 10:36:54 EST


Hi Claudiu,

Thanks for your patch!

On Tue, Oct 10, 2023 at 3:27 PM Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> Add SDHI2 to RZ/G3S Smarc SoM. SDHI2 pins are multiplexed with SCIF1, SSI3,

SSI0

> IRQ0. The selection b/w SDHI2 and SCIF1, SSI3, IRQ0 is done with a switch

and IRQ1 (twice). Or just say "The selection is done ...".

> button. To be able to select b/w these a compilation flag has been added
> (SW_SD2_EN) at the moment being instantiated to select SDHI2.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>

> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> @@ -13,14 +13,21 @@
> * @SW_SD0_DEV_SEL:
> * 0 - SD0 is connected to eMMC
> * 1 - SD0 is connected to uSD0 card
> + * @SW_SD2_EN:
> + * 0 - SCIF1, SSI3, IRQ0, IRQ1 connected to SoC

SSI0

> + * 1 - SD2 is connected to SoC
> */
> #define SW_SD0_DEV_SEL 1
> +#define SW_SD2_EN 1

> @@ -100,6 +125,19 @@ &sdhi0 {
> };
> #endif
>
> +#if SW_SD2_EN
> +&sdhi2 {
> + pinctrl-0 = <&sdhi2_pins>;
> + pinctrl-1 = <&sdhi2_pins>;
> + pinctrl-names = "default", "state_uhs";

Do you need two states if there is only a single voltage?
AFAIK, UHS needs 1.8V.

> + vmmc-supply = <&vcc_sdhi2>;
> + vqmmc-supply = <&reg_3p3v>;
> + bus-width = <4>;
> + max-frequency = <50000000>;
> + status = "okay";
> +};
> +#endif
> +
> &pinctrl {
> sdhi0_pins: sd0 {
> data {

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds