Re: [PATCH v1] i2c: designware: Disable TX_EMPTY irq while waiting for block length byte

[Tam Chi Nguyen]

On 10/3/2023 15:57, Andy Shevchenko wrote:
> On Fri, Sep 29, 2023 at 10:53:56AM +0700, Tam Nguyen wrote:
> > During SMBus block data read process, we have seen high interrupt rate
> > because of TX_EMPTY irq status while waiting for block length byte (the
> > first data byte after the address phase). The interrupt handler does not
> > do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS.
> > Hence, we should disable TX_EMPTY irq until I2C DW receives first data
> IRQ
> DesignWare
Got that. I will update in V2.
> > byte from I2C device, then re-enable it.
> >
> > It takes 0.789 ms for host to receive data length from slave.
> > Without the patch, i2c_dw_isr is called 99 times by TX_EMPTY interrupt.
> i2c_dw_isr()
Will update in V2.
> > And it is none after applying the patch.
> > Cc: stable@xxxxxxxxxxxxxxx
> > Signed-off-by: Chuong Tran <chuong@xxxxxxxxxxxxxxxxxxxxxx>
> Who is this guy? Do you need Co-developed-by tag?
Right, that's my bad. I will update it with "Co-developed-by" tag
> > Signed-off-by: Tam Nguyen <tamnguyenchi@xxxxxxxxxxxxxxxxxxxxxx>
> Other than that, agree with Serge's points.
Thanks both of you. I totally agree with Serge's points and will update 
them in v2.
>