Re: [PATCH 3/5] Staging: sm750fb: Rename displayControl

[Dorcas Litunya]

On Sun, Oct 15, 2023 at 10:23:54PM +0200, Julia Lawall wrote:
> 
> 
> On Sun, 15 Oct 2023, Dorcas AnonoLitunya wrote:
> 
> > Rename variable displayControl to display_control. This follows
> > snakecase naming convention and ensures consistent naming style
> > throughout the file.Issue by checkpatch.
> 
> Actually, the variable seems to be dispControl?
> 
I had actually missed this. Thanks for the correction. Its now corrected
in v2.

Dorcas
> julia
> 
> >
> > Mutes the following checkpatch error:
> > CHECK: Avoid CamelCase: <dispControl>
> >
> > Signed-off-by: Dorcas AnonoLitunya <anonolitunya@xxxxxxxxx>
> > ---
> >  drivers/staging/sm750fb/ddk750_mode.c | 32 +++++++++++++--------------
> >  1 file changed, 16 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
> > index 431b273a347a..fc3db09de9ae 100644
> > --- a/drivers/staging/sm750fb/ddk750_mode.c
> > +++ b/drivers/staging/sm750fb/ddk750_mode.c
> > @@ -15,7 +15,7 @@
> >   */
> >  static unsigned long
> >  display_control_adjust_SM750LE(struct mode_parameter *mode_param,
> > -			       unsigned long dispControl)
> > +			       unsigned long disp_control)
> >  {
> >  	unsigned long x, y;
> >
> > @@ -36,42 +36,42 @@ display_control_adjust_SM750LE(struct mode_parameter *mode_param,
> >  	       ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));
> >
> >  	/*
> > -	 * Assume common fields in dispControl have been properly set before
> > +	 * Assume common fields in disp_control have been properly set before
> >  	 * calling this function.
> > -	 * This function only sets the extra fields in dispControl.
> > +	 * This function only sets the extra fields in disp_control.
> >  	 */
> >
> >  	/* Clear bit 29:27 of display control register */
> > -	dispControl &= ~CRT_DISPLAY_CTRL_CLK_MASK;
> > +	disp_control &= ~CRT_DISPLAY_CTRL_CLK_MASK;
> >
> >  	/* Set bit 29:27 of display control register for the right clock */
> >  	/* Note that SM750LE only need to supported 7 resolutions. */
> >  	if (x == 800 && y == 600)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL41;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL41;
> >  	else if (x == 1024 && y == 768)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL65;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL65;
> >  	else if (x == 1152 && y == 864)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
> >  	else if (x == 1280 && y == 768)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
> >  	else if (x == 1280 && y == 720)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL74;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL74;
> >  	else if (x == 1280 && y == 960)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
> >  	else if (x == 1280 && y == 1024)
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
> >  	else /* default to VGA clock */
> > -		dispControl |= CRT_DISPLAY_CTRL_CLK_PLL25;
> > +		disp_control |= CRT_DISPLAY_CTRL_CLK_PLL25;
> >
> >  	/* Set bit 25:24 of display controller */
> > -	dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
> > +	disp_control |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
> >
> >  	/* Set bit 14 of display controller */
> > -	dispControl |= DISPLAY_CTRL_CLOCK_PHASE;
> > +	disp_control |= DISPLAY_CTRL_CLOCK_PHASE;
> >
> > -	poke32(CRT_DISPLAY_CTRL, dispControl);
> > +	poke32(CRT_DISPLAY_CTRL, disp_control);
> >
> > -	return dispControl;
> > +	return disp_control;
> >  }
> >
> >  /* only timing related registers will be  programed */
> > --
> > 2.42.0.345.gaab89be2eb
> >
> >
> >