Re: [PATCH 2/2] pmdomain: amlogic: Fix mask for the second NNA mem PD domain

From: Neil Armstrong
Date: Thu Oct 26 2023 - 10:42:10 EST


Hi Ulf,

On 26/10/2023 16:36, Ulf Hansson wrote:
On Mon, 16 Oct 2023 at 10:02, Tomeu Vizoso <tomeu@xxxxxxxxxxxxxxx> wrote:

Without this change, the NPU hangs when the 8th NN core is used.

It matches what the out-of-tree driver does.

Signed-off-by: Tomeu Vizoso <tomeu@xxxxxxxxxxxxxxx>

The change looks good to me, but I have been awaiting an ack from some
of the platform/soc maintainers before applying.

That said, it looks like we need a fixes/stable tag too. Is there a
certain commit this fixes?

It looks good for me, you can add:

Fixes: 9a217b7e8953 ("soc: amlogic: meson-pwrc: Add NNA power domain for A311D")

and

Acked-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>

Thanks,
Neil


Kind regards
Uffe

---
drivers/pmdomain/amlogic/meson-ee-pwrc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pmdomain/amlogic/meson-ee-pwrc.c b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
index cfb796d40d9d..0dd71cd814c5 100644
--- a/drivers/pmdomain/amlogic/meson-ee-pwrc.c
+++ b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
@@ -228,7 +228,7 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {

static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
{ G12A_HHI_NANOQ_MEM_PD_REG0, GENMASK(31, 0) },
- { G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(23, 0) },
+ { G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
};

#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \
--
2.41.0