Re: [PATCH 2/2] x86/barrier: Do not serialize MSR accesses on AMD
From: Peter Zijlstra
Date: Fri Oct 27 2023 - 14:56:55 EST
On Fri, Oct 27, 2023 at 05:34:58PM +0200, Borislav Petkov wrote:
> +static inline void weak_wrmsr_fence(void)
> +{
> + alternative("mfence; lfence", "", ALT_VENDOR(X86_VENDOR_AMD));
> +}
Well, you see, AFAICT the non-serializing MSRs thing is an Intel thing,
so everything !Intel wants this gone, no?
Definitely the Hygon thing wants this right along with AMD, because
that's basically AMD, no?