Overhead of io{read,write}{8,16,32,64} on x86

[Jiaxun Yang]

Hi all,

I'm trying to improve Kernel's support of devices that have ioports
mapped into MMIO, that involves converting existing driver which is
using {in,out}{l,w,b} to use io{read,write}{8,16,32,64}, so they can
benefit from ioport_map and pci_iomap.

However, the problem is io{read,write}{8,16,32,64} will incur penalty
on x86 by introducing extra function calls (they are not inlined) and
having extra condition judgment on MMIO vs PIO.

x86 folks, do you think this kind of overhead is acceptable? I do think
most of PCI/ISA drivers will need to be converted.

linux-arch folks, do you think it will be better if we introduce a
variant of io{read,write}{8,16,32,64} that direct to PIO on x86 but
remains the same functionality on other architectures?

Thanks
- Jiaxun