drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:40:17: sparse: sparse: cast removes address space '__iomem' of expression

From: kernel test robot
Date: Fri Nov 03 2023 - 13:37:21 EST


tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 8f6f76a6a29f36d2f3e4510d0bde5046672f6924
commit: 57cbdbe65e5f9ba9bfd67b66bc3ce24ef1c54643 drm/nouveau/kms/nv140-: Use hard-coded wndws or core channel for CRC channel
date: 2 years ago
config: x86_64-randconfig-123-20231101 (https://download.01.org/0day-ci/archive/20231104/202311040149.o3KPXEV2-lkp@xxxxxxxxx/config)
compiler: gcc-11 (Debian 11.3.0-12) 11.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231104/202311040149.o3KPXEV2-lkp@xxxxxxxxx/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311040149.o3KPXEV2-lkp@xxxxxxxxx/

sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:40:17: sparse: sparse: cast removes address space '__iomem' of expression
>> drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:40:17: sparse: sparse: cast removes address space '__iomem' of expression
drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:41:17: sparse: sparse: cast removes address space '__iomem' of expression
drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:41:17: sparse: sparse: cast removes address space '__iomem' of expression
drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:43:17: sparse: sparse: cast removes address space '__iomem' of expression
drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:43:17: sparse: sparse: cast removes address space '__iomem' of expression
drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:44:17: sparse: sparse: cast removes address space '__iomem' of expression
drivers/gpu/drm/nouveau/dispnv50/crcc57d.c:44:17: sparse: sparse: cast removes address space '__iomem' of expression

vim +/__iomem +40 drivers/gpu/drm/nouveau/dispnv50/crcc57d.c

12
13 static int crcc57d_set_src(struct nv50_head *head, int or, enum nv50_crc_source_type source,
14 struct nv50_crc_notifier_ctx *ctx)
15 {
16 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
17 const int i = head->base.index;
18 u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) |
19 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) |
20 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) |
21 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE);
22 int ret;
23
24 switch (source) {
25 case NV50_CRC_SOURCE_TYPE_SOR:
26 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or));
27 break;
28 case NV50_CRC_SOURCE_TYPE_SF:
29 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF);
30 break;
31 default:
32 break;
33 }
34
35 ret = PUSH_WAIT(push, 4);
36 if (ret)
37 return ret;
38
39 if (source) {
> 40 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), ctx->ntfy.handle);
41 PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), crc_args);
42 } else {
43 PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), 0);
44 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), 0);
45 }
46
47 return 0;
48 }
49

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