On 11/15/23 17:20, Andrew Lunn wrote:
On Wed, Nov 15, 2023 at 11:25:14AM +0800, Luo Jie wrote:No, this looks like a total subsystem overreach, these should be
The PHY & PCS clocks need to be enabled and the reset
sequence needs to be completed to make qca8084 PHY
probeable by MDIO bus.
Is all this guaranteed to be the same between different boards?
taken care of from within clk framework and consumed with the clk
APIs.
Konrad