[PATCH v3 1/6] dt-bindings: interrupt-controller: Add support for Realtek DHC SoCs
From: James Tai
Date: Wed Nov 29 2023 - 00:44:48 EST
Add the YAML documentation for Realtek DHC (Digital Home Center) SoCs.
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Closes: https://lore.kernel.org/oe-kbuild-all/202311180921.ayKhiFHL-lkp@xxxxxxxxx/
CC: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CC: Marc Zyngier <maz@xxxxxxxxxx>
CC: Rob Herring <robh+dt@xxxxxxxxxx>
CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
CC: Conor Dooley <conor+dt@xxxxxxxxxx>
CC: linux-kernel@xxxxxxxxxxxxxxx
CC: devicetree@xxxxxxxxxxxxxxx
Signed-off-by: James Tai <james.tai@xxxxxxxxxxx>
---
v2 to v3 change:
- Retested the bindings using the new version of the dtschema
- Fixed the order of property items
- Removed redundant files and replaced them with 'realtek,intc.yaml'
- Replaced 'interrupts-extended' with 'interrupts'
- Added a description for 'interrupts'
- Reduced the example code
v1 to v2 change:
- Tested the bindings using 'make dt_binding_check'
- Fixed code style issues
.../interrupt-controller/realtek,intc.yaml | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml
new file mode 100644
index 000000000000..3aa863b1549d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/realtek,intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek DHC SoCs Interrupt Controller
+
+maintainers:
+ - James Tai <james.tai@xxxxxxxxxxx>
+
+description:
+ This interrupt controller is a component of Realtek DHC (Digital Home Center)
+ SoCs and is designed to receive interrupts from peripheral devices.
+
+ Each DHC SoC has two sets of interrupt controllers, each capable of
+ handling up to 32 interrupts.
+
+allOf:
+ - $ref: /schemas/interrupt-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - realtek,rtd1319-intc-iso
+ - realtek,rtd1319-intc-misc
+ - realtek,rtd1319d-intc-iso
+ - realtek,rtd1319d-intc-misc
+ - realtek,rtd1325-intc-iso
+ - realtek,rtd1325-intc-misc
+ - realtek,rtd1619b-intc-iso
+ - realtek,rtd1619b-intc-misc
+
+ reg:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 1
+
+ '#address-cells':
+ const: 0
+
+ interrupts:
+ description: |
+ Contains the GIC SPI IRQs mapped to the external interrupt lines.
+ minItems: 2
+ maxItems: 4
+
+required:
+ - compatible
+ - reg
+ - interrupt-controller
+ - '#interrupt-cells'
+ - '#address-cells'
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ realtek_iso_intc: interrupt-controller@40 {
+ compatible = "realtek,rtd1319-intc-iso";
+ reg = <0x00 0x40>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+...
--
2.25.1