Re: [PATCH v2 15/21] dt-bindings: mips: cpu: Add I-Class I6500 Multiprocessor Core

[Krzysztof Kozlowski]

On 30/11/2023 11:51, Gregory CLEMENT wrote:
> Hello Krzysztof,
> 
>> On 23/11/2023 16:26, Gregory CLEMENT wrote:
>>> The MIPS Warrior I-class I6500 was announced by Imagination
>>> Technologies in 2016 and is used in the Mobileye SoC EyeQ5.
>>>
>>> Acked-by: Arnd Bergmann <arnd@xxxxxxxx>
>>> Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>
>>> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
>>> ---
>>>  Documentation/devicetree/bindings/mips/cpus.yaml | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml
>>> index cf382dea3922c..b5165cf103e94 100644
>>> --- a/Documentation/devicetree/bindings/mips/cpus.yaml
>>> +++ b/Documentation/devicetree/bindings/mips/cpus.yaml
>>> @@ -39,6 +39,7 @@ properties:
>>>        - mti,mips24KEc
>>>        - mti,mips14KEc
>>>        - mti,mips14Kc
>>> +      - img,i6500
>>
>> Don't break the order of entries.
> 
> Do you mean alphabetic order ?

I guess they are not fully ordered, but adding items to the end of the
list is for sure not improving the order.

> 
> because actually the entries are not really in alphabetic order.
> 
> Should I send first, a patch like the following one ?

I wouldn't care about fixing existing order, so just the entry could be
around the ones 'i' because that part is ordered. All entries are
ordered by vendor prefix, so adding 'img' after 'mti' for sure breaks
that order.
> 

Best regards,
Krzysztof