Re: [DO NOT MERGE v5 17/37] dt-bindings: interrupt-controller: renesas,sh7751-intc: Add json-schema

From: Krzysztof Kozlowski
Date: Tue Dec 05 2023 - 11:04:30 EST


On 05/12/2023 10:45, Yoshinori Sato wrote:
> Renesas SH7751 INTC json-schema.
>

This should not be a separate commit from the header bindings. I already
gave such feedback before. Binding headers and bindings documentation
for the same block come together.

> Signed-off-by: Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx>
> ---
> .../renesas,sh7751-intc.yaml | 105 ++++++++++++++++++
> 1 file changed, 105 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml
> new file mode 100644
> index 000000000000..9d05c10f5c32
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-intc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas SH7751 Interrupt Controller
> +
> +maintainers:
> + - Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx>
> +
> +properties:
> + compatible:
> + items:
> + - const: renesas,sh7751-intc
> +
> + '#interrupt-cells':
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 2
> +
> + reg-names:
> + items:
> + - const: ICR
> + - const: INTPRI00

Both lowercase

> +
> + renesas,icr-irlm:
> + type: boolean
> + description: If true ICR.IRLM=1

Unfortunately neither description nor property name tells me anything.
Description basically copies property name, so it's not useful.

> +
> + renesas,ipr-map:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description: |
> + IRQ to IPR mapping definition.
> + 1st - INTEVT
> + 2nd - Register
> + 3rd - bit index
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> + - reg-names
> + - renesas,ipr-map
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/sh_intc.h>
> + shintc: interrupt-controller@ffd00000 {
> + compatible = "renesas,sh7751-intc";
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + reg = <0xffd00000 14>, <0xfe080000 128>;
> + reg-names = "ICR", "INTPRI00";

reg should be the second property, reg-names should follow.

Best regards,
Krzysztof