RE: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree

[JeeHeng Sia]

> -----Original Message-----
> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> Sent: Monday, December 11, 2023 3:59 PM
> To: JeeHeng Sia <jeeheng.sia@xxxxxxxxxxxxxxxx>
> Cc: Shengyu Qu <wiagn233@xxxxxxxxxxx>; kernel@xxxxxxxx; robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx;
> krzk@xxxxxxxxxx; conor+dt@xxxxxxxxxx; paul.walmsley@xxxxxxxxxx; palmer@xxxxxxxxxxx; aou@xxxxxxxxxxxxxxxxx;
> daniel.lezcano@xxxxxxxxxx; tglx@xxxxxxxxxxxxx; conor@xxxxxxxxxx; anup@xxxxxxxxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx;
> jirislaby@xxxxxxxxxx; michal.simek@xxxxxxx; Michael Zhu <michael.zhu@xxxxxxxxxxxxxxxx>; drew@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-riscv@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Leyfoon Tan
> <leyfoon.tan@xxxxxxxxxxxxxxxx>
> Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
> 
> On Mon, Dec 11, 2023 at 01:38:06AM +0000, JeeHeng Sia wrote:
> >
> > > From: Shengyu Qu <wiagn233@xxxxxxxxxxx>
> > > Sent: Friday, December 8, 2023 8:09 PM
> 
> > > Does the dubhe-80 cores actually support vector? Or vector support
> > >
> > > doesn't exist on actual silicon?
> 
> > We don't have a use case for vector application in JH8100
> 
> I am sorry, but I am not clear on what this means. Do the CPUs on
> the JH8100 support vector or not?
The JH8100 CPU does not support vector operation.