Re: [PATCH v9 1/3] dt-bindings: gpio: add NPCM sgpio driver bindings
From: Jim Liu
Date: Tue Dec 12 2023 - 04:26:57 EST
Hi Paul
Thanks for your review.
I will modify it in the next version.
Best regards,
Jim
On Tue, Dec 12, 2023 at 3:00 PM Paul Menzel <pmenzel@xxxxxxxxxxxxx> wrote:
>
> Dear Jim,
>
>
> Thank you for your patch.
>
> Am 12.12.23 um 07:51 schrieb Jim Liu:
> > Add dt-bindings document for the Nuvoton NPCM7xx sgpio driver
> >
> > Signed-off-by: Jim Liu <jim.t90615@xxxxxxxxx>
> > Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
> > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
>
> As you seem to be employed by Nuvoton, should your company/work email be
> listed somehow, and even be used for the author address?
>
> > ---
> > Changes for v9:
> > - no changed
> > Changes for v8:
> > - no changed
> > Changes for v7:
> > - no changed
> > ---
> > .../bindings/gpio/nuvoton,sgpio.yaml | 86 +++++++++++++++++++
> > 1 file changed, 86 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
> > new file mode 100644
> > index 000000000000..84e0dbcb066c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
> > @@ -0,0 +1,86 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Nuvoton SGPIO controller
> > +
> > +maintainers:
> > + - Jim LIU <JJLIU0@xxxxxxxxxxx>
> > +
> > +description: |
> > + This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC.
> > + Nuvoton NPCM7xx SGPIO module is combine serial to parallel IC (HC595)
>
> s/is combine/combines a/
>
> > + and parallel to serial IC (HC165), and use APB3 clock to control it.
>
> use*s*
>
> > + This interface has 4 pins (D_out , D_in, S_CLK, LDSH).
>
> Only one space before the (.
>
> > + NPCM7xx/NPCM8xx have two sgpio module each module can support up
>
> … modules. Each module …
>
> > + to 64 output pins,and up to 64 input pin, the pin is only for gpi or gpo.
>
> 1. Space after the comma.
> 2. 64 input pin*s
>
> > + GPIO pins have sequential, First half is gpo and second half is gpi.
>
> have sequential ?.
>
> > + GPIO pins can be programmed to support the following options
> > + - Support interrupt option for each input port and various interrupt
> > + sensitivity option (level-high, level-low, edge-high, edge-low)
>
> option*s*
>
> > + - ngpios is number of nuvoton,input-ngpios GPIO lines and nuvoton,output-ngpios GPIO lines.
> > + nuvoton,input-ngpios GPIO lines is only for gpi.
>
> s/is/are/
>
> > + nuvoton,output-ngpios GPIO lines is only for gpo.
>
> s/is/are/
>
> It’d be great if you mentioned the datasheet name and revision in the
> description.
>
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - nuvoton,npcm750-sgpio
> > + - nuvoton,npcm845-sgpio
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + gpio-controller: true
> > +
> > + '#gpio-cells':
> > + const: 2
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + nuvoton,input-ngpios:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + The numbers of GPIO's exposed. GPIO lines is only for gpi.
>
> s/is/are/
>
> > + minimum: 0
> > + maximum: 64
> > +
> > + nuvoton,output-ngpios:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + The numbers of GPIO's exposed. GPIO lines is only for gpo.
>
> s/is/are/
>
> > + minimum: 0
> > + maximum: 64
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - gpio-controller
> > + - '#gpio-cells'
> > + - interrupts
> > + - nuvoton,input-ngpios
> > + - nuvoton,output-ngpios
> > + - clocks
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + gpio8: gpio@101000 {
> > + compatible = "nuvoton,npcm750-sgpio";
> > + reg = <0x101000 0x200>;
> > + clocks = <&clk NPCM7XX_CLK_APB3>;
> > + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + nuvoton,input-ngpios = <64>;
> > + nuvoton,output-ngpios = <64>;
> > + };
>
> Reviewed-by: Paul Menzel <pmenzel@xxxxxxxxxxxxx>
>
>
> Kind regards,
>
> Paul Menzel