Re: [PATCH v7 01/14] net: phy: introduce core support for phy-mode = "10g-qxgmii"

[Andrew Lunn]

On Thu, Dec 14, 2023 at 05:48:00PM +0800, Luo Jie wrote:
> From: Vladimir Oltean <vladimir.oltean@xxxxxxx>
> 
> 10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport
> specification. It uses the same signaling as USXGMII, but it multiplexes
> 4 ports over the link, resulting in a maximum speed of 2.5G per port.
> 
> Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean
> either the single-port USXGMII or the quad-port 10G-QXGMII variant, and
> they could get away just fine with that thus far. But there is a need to
> distinguish between the 2 as far as SerDes drivers are concerned.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@xxxxxxx>
> Signed-off-by: Luo Jie <quic_luoj@xxxxxxxxxxx>

Reviewed-by: Andrew Lunn <andrew@xxxxxxx>

    Andrew