Re: [RFC PATCH net-next] net: ethernet: ti: am65-cpsw-nuss: Enable SGMII mode for J784S4 CPSW9G

[Roger Quadros]

On 21/12/2023 13:10, Chintan Vankar wrote:
> TI's J784S4 SoC supports SGMII mode with CPSW9G instance of the CPSW
> Ethernet Switch. Thus, enable it by adding SGMII mode to the
> extra_modes member of the "j784s4_cpswxg_pdata" SoC data.
> 
> Signed-off-by: Chintan Vankar <c-vankar@xxxxxx>

Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx>

Please send without RFC in subject.

> ---
>  drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> index 7651f90f51f2..9aa5a6108521 100644
> --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> @@ -2855,7 +2855,8 @@ static const struct am65_cpsw_pdata j784s4_cpswxg_pdata = {
>  	.quirks = 0,
>  	.ale_dev_id = "am64-cpswxg",
>  	.fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
> -	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_USXGMII),
> +	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
> +		       BIT(PHY_INTERFACE_MODE_USXGMII),
>  };
>  
>  static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {

-- 
cheers,
-roger