Re: [PATCH v2 3/4] drm/mediatek: dsi: Use bitfield macros where useful
From: kernel test robot
Date: Sat Dec 23 2023 - 02:37:38 EST
Hi AngeloGioacchino,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next drm-exynos/exynos-drm-next drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.7-rc6 next-20231222]
[cannot apply to drm-intel/for-linux-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/AngeloGioacchino-Del-Regno/drm-mediatek-dsi-Use-GENMASK-for-register-mask-definitions/20231222-164513
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link: https://lore.kernel.org/r/20231220135722.192080-4-angelogioacchino.delregno%40collabora.com
patch subject: [PATCH v2 3/4] drm/mediatek: dsi: Use bitfield macros where useful
config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20231223/202312231512.ioiD48LA-lkp@xxxxxxxxx/config)
compiler: arm-linux-gnueabi-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231223/202312231512.ioiD48LA-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202312231512.ioiD48LA-lkp@xxxxxxxxx/
All errors (new ones prefixed by >>):
drivers/gpu/drm/mediatek/mtk_dsi.c: In function 'mtk_dsi_phy_timconfig':
>> drivers/gpu/drm/mediatek/mtk_dsi.c:260:19: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
260 | timcon0 = FIELD_PREP(LPX, timing->lpx) |
| ^~~~~~~~~~
cc1: some warnings being treated as errors
vim +/FIELD_PREP +260 drivers/gpu/drm/mediatek/mtk_dsi.c
236
237 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi)
238 {
239 u32 timcon0, timcon1, timcon2, timcon3;
240 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000);
241 struct mtk_phy_timing *timing = &dsi->phy_timing;
242
243 timing->lpx = (60 * data_rate_mhz / (8 * 1000)) + 1;
244 timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;
245 timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -
246 timing->da_hs_prepare;
247 timing->da_hs_trail = timing->da_hs_prepare + 1;
248
249 timing->ta_go = 4 * timing->lpx - 2;
250 timing->ta_sure = timing->lpx + 2;
251 timing->ta_get = 4 * timing->lpx;
252 timing->da_hs_exit = 2 * timing->lpx + 1;
253
254 timing->clk_hs_prepare = 70 * data_rate_mhz / (8 * 1000);
255 timing->clk_hs_post = timing->clk_hs_prepare + 8;
256 timing->clk_hs_trail = timing->clk_hs_prepare;
257 timing->clk_hs_zero = timing->clk_hs_trail * 4;
258 timing->clk_hs_exit = 2 * timing->clk_hs_trail;
259
> 260 timcon0 = FIELD_PREP(LPX, timing->lpx) |
261 FIELD_PREP(HS_PREP, timing->da_hs_prepare) |
262 FIELD_PREP(HS_ZERO, timing->da_hs_zero) |
263 FIELD_PREP(HS_TRAIL, timing->da_hs_trail);
264
265 timcon1 = FIELD_PREP(TA_GO, timing->ta_go) |
266 FIELD_PREP(TA_SURE, timing->ta_sure) |
267 FIELD_PREP(TA_GET, timing->ta_get) |
268 FIELD_PREP(DA_HS_EXIT, timing->da_hs_exit);
269
270 timcon2 = FIELD_PREP(DA_HS_SYNC, 1) |
271 FIELD_PREP(CLK_ZERO, timing->clk_hs_zero) |
272 FIELD_PREP(CLK_TRAIL, timing->clk_hs_trail);
273
274 timcon3 = FIELD_PREP(CLK_HS_PREP, timing->clk_hs_prepare) |
275 FIELD_PREP(CLK_HS_POST, timing->clk_hs_post) |
276 FIELD_PREP(CLK_HS_EXIT, timing->clk_hs_exit);
277
278 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0);
279 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1);
280 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2);
281 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3);
282 }
283
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