Re: [PATCH] arm64: dts: imx93-var-som: Add Variscite VAR-SOM-MX93

From: Krzysztof Kozlowski
Date: Sat Dec 23 2023 - 09:39:21 EST

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In reply to: Mathieu Othacehe: "[PATCH] arm64: dts: imx93-var-som: Add Variscite VAR-SOM-MX93"
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On 23/12/2023 15:29, Mathieu Othacehe wrote:
> Add DTSI for Variscite VAR-SOM-MX93 System on Module and DTS for Variscite
> VAR-SOM-MX93 on Symphony evaluation board.
>
> This version comes with:
> - NXP i.MX 93 Dual, 1.7GHz, Cortex-A55 + Cortex-M33
> - 2 GB of RAM
> - 16GB eMMC
> - 802.11ax/ac/a/b/g/n WiFi with 5.3 Bluetooth
> - CAN bus
> - Audio codec
>
> Signed-off-by: Mathieu Othacehe <othacehe@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> .../dts/freescale/imx93-var-som-symphony.dts | 307 +++++++++++++++++
> .../boot/dts/freescale/imx93-var-som.dtsi | 312 ++++++++++++++++++
> 3 files changed, 620 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
> create mode 100644 arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 2e027675d7bb..a6f1700961e3 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
>
> imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo
> imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo
> diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
> new file mode 100644
> index 000000000000..85b1355cf805
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
> @@ -0,0 +1,307 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2021 NXP
> + * Copyright 2023 Variscite Ltd.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx93-var-som.dtsi"
> +
> +/{
> + model = "Variscite VAR-SOM-MX93 on Symphony evaluation board";
> + compatible = "variscite,var-som-imx93-symphony", "variscite,var-som-mx93", "fsl,imx93";

Please run scripts/checkpatch.pl and fix reported warnings. Some
warnings can be ignored, but the code here looks like it needs a fix.
Feel free to get in touch if the warning is not clear.

Also, wrap it at 80.

> +
> + aliases {
> + ethernet1 = &fec;
> + };
> +
> + chosen {
> + stdout-path = &lpuart1;
> + };
> +
> + /*
> + * Needed only for Symphony <= v1.5
> + */
> + reg_fec_phy: regulator-fec-phy {
> + compatible = "regulator-fixed";
> + regulator-name = "fec-phy";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-enable-ramp-delay = <20000>;
> + gpio = <&pca9534 7 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + regulator-always-on;
> + };
> +
> + reg_usdhc2_vmmc: regulator-usdhc2 {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> + regulator-name = "VSD_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
> + off-on-delay-us = <20000>;
> + enable-active-high;
> + };
> +
> + reg_vref_1v8: regulator-adc-vref {
> + compatible = "regulator-fixed";
> + regulator-name = "vref_1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + ethosu_mem: ethosu_region@88000000 {

No underscores in node names.

Please do not upstream downstream DTS, but fix it to match proper Linux
coding style.

...

> + pinctrl_lpi2c1: lpi2c1grp {
> + fsl,pins = <
> + MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
> + MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
> + >;
> + };
> +
> + pinctrl_lpi2c1_gpio: lpi2c1grp-gpio {

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

...

> +
> +&lpi2c1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep", "gpio";
> + pinctrl-0 = <&pinctrl_lpi2c1>;
> + pinctrl-1 = <&pinctrl_lpi2c1_gpio>;
> + pinctrl-2 = <&pinctrl_lpi2c1_gpio>;
> + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
> + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + /* DS1337 RTC module */
> + rtc@68 {
> + status = "okay";

Drop. It is never the first property, BTW.

> + compatible = "dallas,ds1337";
> + reg = <0x68>;
> + };
> +};
> +
> +&lpi2c5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep", "gpio";
> + pinctrl-0 = <&pinctrl_lpi2c5>;
> + pinctrl-1 = <&pinctrl_lpi2c5_gpio>;
> + pinctrl-2 = <&pinctrl_lpi2c5_gpio>;
> + scl-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
> + sda-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + pca9534: gpio@20 {
> + status = "okay";

Drop.

> + compatible = "nxp,pca9534";
> + reg = <0x20>;
> + gpio-controller;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pca9534>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
> + #gpio-cells = <2>;
> + wakeup-source;
> + };
> +};

...

> diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
> new file mode 100644
> index 000000000000..30b969d0134d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
> @@ -0,0 +1,312 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2022 NXP
> + * Copyright 2023 Variscite Ltd.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/usb/pd.h>
> +#include "imx93.dtsi"
> +
> +/{
> + model = "Variscite VAR-SOM-MX93 module";
> + compatible = "variscite,var-som-imx93", "fsl,imx93";

Please run scripts/checkpatch.pl and fix reported warnings. Some
warnings can be ignored, but the code here looks like it needs a fix.
Feel free to get in touch if the warning is not clear.

> +
> + iw612_pwrseq: iw612_pwrseq {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation

> + compatible = "mmc-pwrseq-simple";
> + post-power-on-delay-ms = <100>;
> + power-off-delay-us = <10000>;
> + reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>, /* WIFI_RESET */
> + <&gpio3 7 GPIO_ACTIVE_LOW>; /* WIFI_PWR_EN */
> + status = "okay";

Drop

....

> + pinctrl_lpi2c3: lpi2c3grp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> + >;
> + };
> +
> + pinctrl_lpi2c3_gpio: lpi2c3grp-gpio {

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

...

> +
> +&lpi2c3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep", "gpio";
> + pinctrl-0 = <&pinctrl_lpi2c3>;
> + pinctrl-1 = <&pinctrl_lpi2c3_gpio>;
> + pinctrl-2 = <&pinctrl_lpi2c3_gpio>;
> + scl-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
> + sda-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + pmic@25 {
> + compatible = "nxp,pca9451a";

Please run scripts/checkpatch.pl and fix reported warnings. Some
warnings can be ignored, but the code here looks like it needs a fix.
Feel free to get in touch if the warning is not clear.

I don't see this compatible documented and cover letter or changelog
does not mention neither dependencies nor other series bringing it.

> + reg = <0x25>;
> +
> + regulators {
> + buck1: BUCK1 {

Lowercase

> + regulator-name = "BUCK1";
> + regulator-min-microvolt = <650000>;
> + regulator-max-microvolt = <2237500>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <3125>;
> + };
> +
> + buck2: BUCK2 {

Lowercase, further as well

...

Best regards,
Krzysztof

Next message: Gary Guo: "Re: [PATCH v2 1/3] rust: macros: add `decl_generics` to `parse_generics()`"
Previous message: Masahiro Yamada: "Re: [PATCH 1/4] linux/export: Fix alignment for 64-bit ksymtab entries"
In reply to: Mathieu Othacehe: "[PATCH] arm64: dts: imx93-var-som: Add Variscite VAR-SOM-MX93"
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