Re: [PATCH v2 2/2] x86/resctrl: Remove hard-coded memory bandwidth event configuration

From: Moger, Babu
Date: Thu Jan 04 2024 - 08:50:36 EST


Hi Reinette,

On 1/3/24 15:40, Reinette Chatre wrote:
> Hi Babu,
>
> On 1/3/2024 1:03 PM, Moger, Babu wrote:
>> On 1/3/24 12:38, Reinette Chatre wrote:
>>> On 1/2/2024 12:00 PM, Moger, Babu wrote:
>>>> On 12/14/23 19:24, Reinette Chatre wrote:
>>>>> On 12/12/2023 10:02 AM, Babu Moger wrote:
>>>
>>>>>> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
>>>>>> index f136ac046851..30bf919edfda 100644
>>>>>> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
>>>>>> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
>>>>>> @@ -813,6 +813,12 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r)
>>>>>> return ret;
>>>>>>
>>>>>> if (rdt_cpu_has(X86_FEATURE_BMEC)) {
>>>>>> + u32 eax, ebx, ecx, edx;
>>>>>> +
>>>>>> + /* Detect list of bandwidth sources that can be tracked */
>>>>>> + cpuid_count(0x80000020, 3, &eax, &ebx, &ecx, &edx);
>>>>>> + hw_res->event_mask = ecx;
>>>>>> +
>>>>>
>>>>> This has the same issue as I mentioned in V1. Note that this treats
>>>>> reserved bits as valid values. I think this is a risky thing to do. For example
>>>>> when this code is run on future hardware the currently reserved bits may have
>>>>> values with different meaning than what this code uses it for.
>>>>
>>>> Sure. Will use the mask MAX_EVT_CONFIG_BITS.
>>>> hw_res->mbm_cfg_mask = ecx & MAX_EVT_CONFIG_BITS;
>>>>
>>>>>
>>>>>> if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) {
>>>>>> mbm_total_event.configurable = true;
>>>>>> mbm_config_rftype_init("mbm_total_bytes_config");
>>>>>> diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>>>>>> index 69a1de92384a..8a1e9fdab974 100644
>>>>>> --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>>>>>> +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>>>>>> @@ -1537,17 +1537,14 @@ static void mon_event_config_read(void *info)
>>>>>> {
>>>>>> struct mon_config_info *mon_info = info;
>>>>>> unsigned int index;
>>>>>> - u64 msrval;
>>>>>> + u32 h;
>>>>>>
>>>>>> index = mon_event_config_index_get(mon_info->evtid);
>>>>>> if (index == INVALID_CONFIG_INDEX) {
>>>>>> pr_warn_once("Invalid event id %d\n", mon_info->evtid);
>>>>>> return;
>>>>>> }
>>>>>> - rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval);
>>>>>> -
>>>>>> - /* Report only the valid event configuration bits */
>>>>>> - mon_info->mon_config = msrval & MAX_EVT_CONFIG_BITS;
>>>>>> + rdmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, h);
>>>>>
>>>>> I do not think this code needed to be changed. We do not want to treat
>>>>> reserved bits as valid values.
>>>>
>>>> The logic is still the same. We don't have access to rdt_hw_resource in
>>>> this function. So, I just moved the masking to mbm_config_show while printing.
>>>
>>> Why do you need access to rdt_hw_resource? This comment is not about the bandwidth
>>> events supported by the device but instead the bits used to represent these events.
>>> This is the same issue as in rdt_get_mon_l3_config. The above change returns
>>> reserved bits as valid while the original code ensured that only bits used for
>>> field are returned (through the usage of MAX_EVT_CONFIG_BITS).
>>
>> We are already saving the valid bits in hw_res->mbm_cfg_mask during the init.
>>
>> hw_res->mbm_cfg_mask = ecx & MAX_EVT_CONFIG_BITS;
>>
>> I thought we can use it here directly to mask any unsupported bits. So, I
>> re-arranged the code here.
>
> I am not sure where you mean when you say "use it here" since mbm_cfg_mask is not
> used in mon_event_config_read(). My comment is related to mon_event_config_read()
> that can reasonably be expected to, and thus should, return the current "mon event
> config" value and nothing more.
>

Ok. Sure. Lets keep the same code as before.

--
Thanks
Babu Moger