Re: [PATCH v2 10/10] clk: qcom: Add camcc clock driver for x1e80100

[Abel Vesa]

On 24-01-23 18:56:03, Konrad Dybcio wrote:
> 
> 
> On 1/23/24 12:49, Abel Vesa wrote:
> > On 23-12-16 14:39:48, Konrad Dybcio wrote:
> > > On 14.12.2023 17:49, Abel Vesa wrote:
> > > > From: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
> > > > 
> > > > Add the camcc clock driver for x1e80100
> > > > 
> > > > Signed-off-by: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
> > > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> > > > ---
> > > [...]
> > > 
> > > > +enum {
> > > > +	DT_BI_TCXO,
> > > > +	DT_BI_TCXO_AO,
> > > > +	DT_SLEEP_CLK,
> > > > +};
> > > > +
> > > > +enum {
> > > > +	P_BI_TCXO,
> > > Please don't overload this define with DT_BI_TCXO_AO, add a new one
> > > for the active-only clock. Please also do this in other drivers in
> > > this series.
> > 
> > Nope, that needs to stay if we want to align the dt bindings between
> > SM8550, SM8650 and this. At least for dispcc. But I would like to have
> > the same dt schema for the rest of the clock controller drivers between
> > platforms that share basically the same ip block.
> 
> No, you're confusing the dt ordering enum (the first one) with the
> parent list enum (the one below that I'm commenting on).

Got it. P_BI_TCXO_AO it is then.

> 
> Konrad