Re: [PATCH V3 4/4] riscv: mm: Optimize TASK_SIZE definition

[Charlie Jenkins]

On Fri, Dec 22, 2023 at 06:57:03AM -0500, guoren@xxxxxxxxxx wrote:
> From: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
> 
> Unify the TASK_SIZE definition with VA_BITS for better readability.
> Add COMPAT mode user address space info in the comment.
> 
> Reviewed-by: Leonardo Bras <leobras@xxxxxxxxxx>
> Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
> Signed-off-by: Guo Ren <guoren@xxxxxxxxxx>
> ---
>  arch/riscv/include/asm/pgtable.h | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index e415582276ec..271565e1956f 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -866,6 +866,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
>   * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
>   * Task size is:
>   * -        0x9fc00000	(~2.5GB) for RV32.
> + * -        0x80000000	(   2GB) for RV64 compat mode
>   * -      0x4000000000	( 256GB) for RV64 using SV39 mmu
>   * -    0x800000000000	( 128TB) for RV64 using SV48 mmu
>   * - 0x100000000000000	(  64PB) for RV64 using SV57 mmu
> @@ -877,10 +878,10 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
>   * Similarly for SV57, bits 63–57 must be equal to bit 56.
>   */
>  #ifdef CONFIG_64BIT
> -#define TASK_SIZE_64	(PGDIR_SIZE * PTRS_PER_PGD / 2)
> +#define TASK_SIZE_64	(UL(1) << (VA_BITS - 1))
>  
>  #ifdef CONFIG_COMPAT
> -#define TASK_SIZE_32	(_AC(0x80000000, UL))
> +#define TASK_SIZE_32	(UL(1) << (VA_BITS_SV32 - 1))
>  #define TASK_SIZE	(test_thread_flag(TIF_32BIT) ? \
>  			 TASK_SIZE_32 : TASK_SIZE_64)
>  #else
> -- 
> 2.40.1
> 

Reviewed-by: Charlie Jenkins <charlie@xxxxxxxxxxxx>