Re: [PATCH v4 6/8] arm64: dts: qcom: sa8295p-adp: add max20411
From: Dmitry Baryshkov
Date: Thu Jan 25 2024 - 17:30:11 EST
On Thu, 25 Jan 2024 at 23:06, Bjorn Andersson <quic_bjorande@xxxxxxxxxxx> wrote:
>
> From: Bjorn Andersson <andersson@xxxxxxxxxx>
>
> The SA8295P ADP has a MAX20411 LDO regulator on I2C 12, supplying the
> VDD_GFX pads. Enable the bus and add the maxim,max20411 device on the
> bus.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
This doesn't match the From header.
> ---
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 39 ++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> index fd253942e5e5..bd0962f39fc5 100644
> --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> @@ -266,6 +266,26 @@ &dispcc1 {
> status = "okay";
> };
>
> +&i2c12 {
> + pinctrl-0 = <&qup1_i2c4_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + vdd_gfx: regulator@39 {
> + compatible = "maxim,max20411";
> + reg = <0x39>;
> +
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <800000>;
> +
> + enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-0 = <&max20411_en>;
> + pinctrl-names = "default";
> + };
> +};
> +
> &mdss0 {
> status = "okay";
> };
> @@ -476,6 +496,10 @@ &pcie4_phy {
> status = "okay";
> };
>
> +&qup1 {
> + status = "okay";
> +};
> +
> &qup2 {
> status = "okay";
> };
> @@ -636,6 +660,14 @@ &xo_board_clk {
>
> /* PINCTRL */
>
> +&pmm8540a_gpios {
> + max20411_en: max20411-en-state {
> + pins = "gpio2";
> + function = "normal";
> + output-enable;
> + };
> +};
> +
> &tlmm {
> pcie2a_default: pcie2a-default-state {
> clkreq-n-pins {
> @@ -728,4 +760,11 @@ wake-n-pins {
> bias-pull-up;
> };
> };
> +
> + qup1_i2c4_state: qup1-i2c4-state {
> + pins = "gpio0", "gpio1";
> + function = "qup12";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> };
>
> --
> 2.25.1
>
>
--
With best wishes
Dmitry