drivers/irqchip/irq-stm32-exti.c:870:1-6: WARNING: invalid free of devm_ allocated data
From: kernel test robot
Date: Fri Jan 26 2024 - 18:30:58 EST
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: ecb1b8288dc7ccbdcb3b9df005fa1c0e0c0388a7
commit: 09f6b27d5ddd9ad0ec096d1b0f8decdacc70f0f8 ARM: dove: multiplatform support
date: 1 year, 10 months ago
config: arm-randconfig-r062-20240117 (https://download.01.org/0day-ci/archive/20240127/202401270747.eBM5wlwo-lkp@xxxxxxxxx/config)
compiler: clang version 18.0.0git (https://github.com/llvm/llvm-project 9bde5becb44ea071f5e1fa1f5d4071dc8788b18c)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401270747.eBM5wlwo-lkp@xxxxxxxxx/
cocci warnings: (new ones prefixed by >>)
>> drivers/irqchip/irq-stm32-exti.c:870:1-6: WARNING: invalid free of devm_ allocated data
drivers/irqchip/irq-stm32-exti.c:871:1-6: WARNING: invalid free of devm_ allocated data
--
>> drivers/bus/arm-cci.c:458:1-33: WARNING: Function "for_each_available_child_of_node" should have of_node_put() before break around line 465.
--
>> arch/arm/kernel/topology.c:94:1-15: alloc with no test, possible model on line 102
--
>> drivers/cpufreq/armada-37xx-cpufreq.c:274:23-24: WARNING opportunity for max()
drivers/cpufreq/armada-37xx-cpufreq.c:282:23-24: WARNING opportunity for max()
--
>> drivers/gpio/gpio-zynq.c:800:12-13: WARNING opportunity for min()
--
>> arch/arm/mach-omap2/dma.c:82:10-16: Unneeded variable: "errata". Return " 0" on line 161
vim +870 drivers/irqchip/irq-stm32-exti.c
f9fc1745501e7b Ludovic Barre 2018-04-26 801
f9fc1745501e7b Ludovic Barre 2018-04-26 802 static int __init stm32_exti_init(const struct stm32_exti_drv_data *drv_data,
f9fc1745501e7b Ludovic Barre 2018-04-26 803 struct device_node *node)
f9fc1745501e7b Ludovic Barre 2018-04-26 804 {
f9fc1745501e7b Ludovic Barre 2018-04-26 805 struct stm32_exti_host_data *host_data;
e072041688ca73 Alexandre TORGUE 2016-09-20 806 unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
f9fc1745501e7b Ludovic Barre 2018-04-26 807 int nr_irqs, ret, i;
e072041688ca73 Alexandre TORGUE 2016-09-20 808 struct irq_chip_generic *gc;
e072041688ca73 Alexandre TORGUE 2016-09-20 809 struct irq_domain *domain;
e072041688ca73 Alexandre TORGUE 2016-09-20 810
f9fc1745501e7b Ludovic Barre 2018-04-26 811 host_data = stm32_exti_host_init(drv_data, node);
4096165d55218a Dan Carpenter 2018-08-08 812 if (!host_data)
4096165d55218a Dan Carpenter 2018-08-08 813 return -ENOMEM;
e072041688ca73 Alexandre TORGUE 2016-09-20 814
f9fc1745501e7b Ludovic Barre 2018-04-26 815 domain = irq_domain_add_linear(node, drv_data->bank_nr * IRQS_PER_BANK,
e072041688ca73 Alexandre TORGUE 2016-09-20 816 &irq_exti_domain_ops, NULL);
e072041688ca73 Alexandre TORGUE 2016-09-20 817 if (!domain) {
f9c75bca44d475 Yangtao Li 2018-11-23 818 pr_err("%pOFn: Could not register interrupt domain.\n",
f9c75bca44d475 Yangtao Li 2018-11-23 819 node);
e072041688ca73 Alexandre TORGUE 2016-09-20 820 ret = -ENOMEM;
e072041688ca73 Alexandre TORGUE 2016-09-20 821 goto out_unmap;
e072041688ca73 Alexandre TORGUE 2016-09-20 822 }
e072041688ca73 Alexandre TORGUE 2016-09-20 823
6dd64ee17e04c3 Ludovic Barre 2017-11-06 824 ret = irq_alloc_domain_generic_chips(domain, IRQS_PER_BANK, 1, "exti",
e072041688ca73 Alexandre TORGUE 2016-09-20 825 handle_edge_irq, clr, 0, 0);
e072041688ca73 Alexandre TORGUE 2016-09-20 826 if (ret) {
e81f54c668d89e Rob Herring 2017-07-18 827 pr_err("%pOF: Could not allocate generic interrupt chip.\n",
e81f54c668d89e Rob Herring 2017-07-18 828 node);
e072041688ca73 Alexandre TORGUE 2016-09-20 829 goto out_free_domain;
e072041688ca73 Alexandre TORGUE 2016-09-20 830 }
e072041688ca73 Alexandre TORGUE 2016-09-20 831
f9fc1745501e7b Ludovic Barre 2018-04-26 832 for (i = 0; i < drv_data->bank_nr; i++) {
f9fc1745501e7b Ludovic Barre 2018-04-26 833 const struct stm32_exti_bank *stm32_bank;
f9fc1745501e7b Ludovic Barre 2018-04-26 834 struct stm32_exti_chip_data *chip_data;
6dd64ee17e04c3 Ludovic Barre 2017-11-06 835
f9fc1745501e7b Ludovic Barre 2018-04-26 836 stm32_bank = drv_data->exti_banks[i];
cfbf9e497094dc Fabien Dessenne 2019-04-17 837 chip_data = stm32_exti_chip_init(host_data, i, node);
d9e2b19b027440 Ludovic Barre 2018-04-26 838
6dd64ee17e04c3 Ludovic Barre 2017-11-06 839 gc = irq_get_domain_generic_chip(domain, i * IRQS_PER_BANK);
6dd64ee17e04c3 Ludovic Barre 2017-11-06 840
f9fc1745501e7b Ludovic Barre 2018-04-26 841 gc->reg_base = host_data->base;
e072041688ca73 Alexandre TORGUE 2016-09-20 842 gc->chip_types->type = IRQ_TYPE_EDGE_BOTH;
be6230f0c2bd5d Ludovic Barre 2018-04-26 843 gc->chip_types->chip.irq_ack = stm32_irq_ack;
e072041688ca73 Alexandre TORGUE 2016-09-20 844 gc->chip_types->chip.irq_mask = irq_gc_mask_clr_bit;
e072041688ca73 Alexandre TORGUE 2016-09-20 845 gc->chip_types->chip.irq_unmask = irq_gc_mask_set_bit;
e072041688ca73 Alexandre TORGUE 2016-09-20 846 gc->chip_types->chip.irq_set_type = stm32_irq_set_type;
d9e2b19b027440 Ludovic Barre 2018-04-26 847 gc->chip_types->chip.irq_set_wake = irq_gc_set_wake;
d9e2b19b027440 Ludovic Barre 2018-04-26 848 gc->suspend = stm32_irq_suspend;
d9e2b19b027440 Ludovic Barre 2018-04-26 849 gc->resume = stm32_irq_resume;
d9e2b19b027440 Ludovic Barre 2018-04-26 850 gc->wake_enabled = IRQ_MSK(IRQS_PER_BANK);
d9e2b19b027440 Ludovic Barre 2018-04-26 851
6dd64ee17e04c3 Ludovic Barre 2017-11-06 852 gc->chip_types->regs.mask = stm32_bank->imr_ofst;
d9e2b19b027440 Ludovic Barre 2018-04-26 853 gc->private = (void *)chip_data;
6dd64ee17e04c3 Ludovic Barre 2017-11-06 854 }
e072041688ca73 Alexandre TORGUE 2016-09-20 855
e072041688ca73 Alexandre TORGUE 2016-09-20 856 nr_irqs = of_irq_count(node);
e072041688ca73 Alexandre TORGUE 2016-09-20 857 for (i = 0; i < nr_irqs; i++) {
e072041688ca73 Alexandre TORGUE 2016-09-20 858 unsigned int irq = irq_of_parse_and_map(node, i);
e072041688ca73 Alexandre TORGUE 2016-09-20 859
e072041688ca73 Alexandre TORGUE 2016-09-20 860 irq_set_handler_data(irq, domain);
e072041688ca73 Alexandre TORGUE 2016-09-20 861 irq_set_chained_handler(irq, stm32_irq_handler);
e072041688ca73 Alexandre TORGUE 2016-09-20 862 }
e072041688ca73 Alexandre TORGUE 2016-09-20 863
e072041688ca73 Alexandre TORGUE 2016-09-20 864 return 0;
e072041688ca73 Alexandre TORGUE 2016-09-20 865
e072041688ca73 Alexandre TORGUE 2016-09-20 866 out_free_domain:
e072041688ca73 Alexandre TORGUE 2016-09-20 867 irq_domain_remove(domain);
e072041688ca73 Alexandre TORGUE 2016-09-20 868 out_unmap:
f9fc1745501e7b Ludovic Barre 2018-04-26 869 iounmap(host_data->base);
f9fc1745501e7b Ludovic Barre 2018-04-26 @870 kfree(host_data->chips_data);
f9fc1745501e7b Ludovic Barre 2018-04-26 871 kfree(host_data);
e072041688ca73 Alexandre TORGUE 2016-09-20 872 return ret;
e072041688ca73 Alexandre TORGUE 2016-09-20 873 }
e072041688ca73 Alexandre TORGUE 2016-09-20 874
:::::: The code at line 870 was first introduced by commit
:::::: f9fc1745501e7b91e5b853e790de63ff9e1a3404 irqchip/stm32: Add host and driver data structures
:::::: TO: Ludovic Barre <ludovic.barre@xxxxxx>
:::::: CC: Marc Zyngier <marc.zyngier@xxxxxxx>
--
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