Re: [PATCH v8 3/3] riscv: dts: allwinner: d1: Add pwm node
From: Andre Przywara
Date: Wed Jan 31 2024 - 09:56:08 EST
On Wed, 31 Jan 2024 15:59:16 +0300
Aleksandr Shubin <privatesub2@xxxxxxxxx> wrote:
Hi,
> D1 and T113s contain a pwm controller with 8 channels.
> This controller is supported by the sun20i-pwm driver.
>
> Add a device tree node for it.
>
> Signed-off-by: Aleksandr Shubin <privatesub2@xxxxxxxxx>
Compared against the manual:
Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>
Cheers,
Andre
> ---
> arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index 5a9d7f5a75b4..435a1e66aa6a 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -145,6 +145,18 @@ uart3_pb_pins: uart3-pb-pins {
> };
> };
>
> + pwm: pwm@2000c00 {
> + compatible = "allwinner,sun20i-d1-pwm";
> + reg = <0x02000c00 0x400>;
> + clocks = <&ccu CLK_BUS_PWM>,
> + <&dcxo>,
> + <&ccu CLK_APB0>;
> + clock-names = "bus", "hosc", "apb0";
> + resets = <&ccu RST_BUS_PWM>;
> + status = "disabled";
> + #pwm-cells = <0x3>;
> + };
> +
> ccu: clock-controller@2001000 {
> compatible = "allwinner,sun20i-d1-ccu";
> reg = <0x2001000 0x1000>;