Re: [PATCH net-next 1/3] dt-bindings: net: dp83822: support configuring RMII master/slave mode

[Andrew Lunn]

On Thu, Feb 22, 2024 at 11:31:15AM +0100, Jérémie Dautheribes wrote:
> Add property ti,rmii-mode to support selecting the RMII operation mode
> between:
> 	- master mode (PHY operates from a 25MHz clock reference)
> 	- slave mode (PHY operates from a 50MHz clock reference)
> 
> If not set, the operation mode is configured by hardware straps.
> 
> Signed-off-by: Jérémie Dautheribes <jeremie.dautheribes@xxxxxxxxxxx>
> ---
>  .../devicetree/bindings/net/ti,dp83822.yaml      | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml
> index 8f4350be689c..8f23254c0458 100644
> --- a/Documentation/devicetree/bindings/net/ti,dp83822.yaml
> +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml
> @@ -80,6 +80,22 @@ properties:
>             10625, 11250, 11875, 12500, 13125, 13750, 14375, 15000]
>      default: 10000
>  
> +  ti,rmii-mode:
> +    description: |
> +       If present, select the RMII operation mode. Two modes are
> +       available:
> +         - RMII master, where the PHY operates from a 25MHz clock reference,
> +         provided by a crystal or a CMOS-level oscillator
> +         - RMII slave, where the PHY operates from a 50MHz clock reference,
> +         provided by a CMOS-level oscillator

What has master and slave got to do with this?

Sometimes, the MAC provides a clock to the PHY, and all data transfer
over the RMII bus is timed by that.

Sometimes, the PHY provides a clock to the MAC, and all data transfer
over the RMII bus is timed by that.

Here there is a clear master/slave relationship, who is providing the
clock, who is consuming the clock. However, what you describe does not
fit that. Maybe look at other PHY bindings, and copy what they do for
clocks.

	Andrew